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MT91L61AE Datasheet(PDF) 11 Page - Mitel Networks Corporation |
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MT91L61AE Datasheet(HTML) 11 Page - Mitel Networks Corporation |
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11 / 32 page  Advance Information MT91L60/61 11 Applications Figure 8 shows an application in a wireless phone set. Figure 9 shows an MT9161B’s delayed frame pulse driving a second MT9161B. This configuration would be used where multiple CODEC’s were using a data bus (an example being Mitel’s ST-BUS). Table 2: 3V Multi-featured Codec Register Map 00 RxINC RxFG2 RxFG1 RxFG0 TxINC TxFG2 TxFG1 TxFG0 Gain Control Register 1 01 ----- STG2 STG1 STG0 Gain Control Register 2 02 ------- DrGain Path Control 03 PDFDI PDDR RST - TxMute RxMute TxBsel RxBsel Control Register 1 04 CEN DEN D8 A/ µ Smag/ ITU-T CSL2 CSL1 CSL0 Control Register 2 05 C7 C6 C5 C4 C3 C2 C1 C0 C-Channel Register 06 D7 D6 D5 D4 D3 D2 D1 D0 D-Channel Register 07 ---- PCM/ ANALOG loopen - - Loop Back Note: Bits marked "-" are reserved bits and should be written with logic "0" |
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