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MT9300AL Datasheet(PDF) 1 Page - Mitel Networks Corporation |
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MT9300AL Datasheet(HTML) 1 Page - Mitel Networks Corporation |
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1 / 29 page  1 Features • Independent multiple channels echo cancellation; from 32 channels of 64ms to 16 channels of 128ms with the ability to mix channels at 128ms or 64ms in any combination • Independent Power Down mode for each group of 2 channels for power management • Conforms to ITU-T G.165 and G.168 Recommendations • Field proven, high quality performance • Compatible to ST-BUS and GCI interface at 2Mb/s serial PCM • PCM coding, µ/A-Law ITU-T G.711 or sign magnitude • Per channel Fax/Modem G.164 2100Hz or G.165 2100Hz phase reversal Tone Disable • Per channel echo canceller parameters control • Transparent data transfer and mute • Non-Linear processor with high quality subjective performance • Protection against narrow band signal divergence • Offset nulling of all PCM channels • 10 MHz or 20 MHz master clock operation • 3.3 Volts operation with 5-Volt tolerant inputs • No external memory required • Non-multiplexed microprocessor interface • IEEE-1149.1 (JTAG) Test Access Port Applications • Voice over IP network gateways • Voice over ATM, Frame Relay • T1/E1/J1 multichannel echo cancellation • Wireless base stations • Echo Canceller pools • DCME, satellite and multiplexer systems Description The MT9300 Voice Echo Canceller implements a cost effective solution for telephony voice-band echo cancellation conforming to ITU-T G.168 requirements. The MT9300 architecture contains 16 groups of two echo cancellers (ECA and ECB) which can be configured to provide two channels of 64 milliseconds or one channel of 128 milliseconds echo cancellation. This provides 32 channels of 64 milliseconds to 16 channels of 128 milliseconds echo cancellation or any combination of the two configurations. The MT9300 supports ITU-T G.165 and G.164 tone disable requirements. Figure 1 - Functional Block Diagram RESET Rout IC0 Sout DS CS R/W A10-A0 DTA D7-D0 Test Port Microprocessor Interface Timing Unit Echo Canceller Pool VSS VDD TDI TDO TCK TRST TMS Rin IRQ C4i F0i MCLK ODE Sin Serial to Parallel Parallel to Serial PLL Fsel Group 0 ECA/ECB Group 4 ECA/ECB Group 8 ECA/ECB Group 12 ECA/ECB Group 1 ECA/ECB Group 5 ECA/ECB Group 9 ECA/ECB Group 13 ECA/ECB Group 2 ECA/ECB Group 6 ECA/ECB Group 10 ECA/ECB Group 14 ECA/ECB Group 3 ECA/ECB Group 7 ECA/ECB Group 11 ECA/ECB Group 15 ECA/ECB Note: Refer to Figure 3 for Echo Canceller block diagram Ordering Information MT9300AL 160-Pin MQFP -40 °C to +85°C DS5030 ISSUE 2 May 1999 MT9300 Multi-Channel Voice Echo Canceller Advance Information |
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