TLV5617A_15 datasheet(6/20 Pages) TI

Part #	TLV5617A

Description	2.7-V TO 5.5-V LOW POWER 12-BIT DIGITAL-TO-ANALOG CONVERTERS WITH POWER DOWN

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Manufacturer	TI [Texas Instruments]

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TLV5617A

2.7-V TO 5.5-V LOW-POWER DUAL 10-BIT DIGITAL-TO-ANALOG

CONVERTER WITH POWER DOWN

SLAS234F – JULY 1999 – REVISED JULY 2002

6

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

digital input timing requirements

MIN

NOM

MAX

UNIT

t

Setup time CS low before first negative SCLK edge

VDD = 2.7 V to 3.3 V

10

ns

tsu(CS–CK)

Setup time, CS low before first negative SCLK edge

VDD = 4.5 V to 5.5 V

5

ns

tsu(C16-CS)

Setup time, 16th negative SCLK edge before CS rising edge

10

ns

twH

SCLK pulse width high

25

ns

twL

SCLK pulse width low

25

ns

t

Setup time data ready before SCLK falling edge

VDD = 2.7 V to 3.3 V

10

ns

tsu(D)

Setup time, data ready before SCLK falling edge

VDD = 4.5 V to 5.5 V

5

ns

th(D)

Hold time data held valid after SCLK falling edge

VDD = 2.7 V to 3.3 V

10

ns

th(D)

Hold time, data held valid after SCLK falling edge

VDD = 4.5 V to 5.5 V

5

ns

timing requirements

twL

SCLK

CS

DIN

D15

D14

D13

D12

D1

D0

X

1

X

23

4

15

16

X

twH

tsu(D) th(D)

tsu(CS-CK)

tsu(C16-CS)

Figure 1. Timing Diagram

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