MDC5001T1 datasheet(10/12 Pages) ONSEMI

Part #	MDC5001T1

Description	Low Voltage Bias Stabilizer with Enable

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Manufacturer	ONSEMI [ON Semiconductor]

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MDC5001T1

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10

Figure 19. Class A Biasing of a Typical 890 MHz Depletion Mode GaAs FET Amplifier

Q3

MRF9811

Typ

Iout

ID = 15 mAdc

REGULATED VCC = 2.75 Vdc

6.8 nH

2.7 pF

1 K

6.1 pF

1000 pF

RF IN

12.5 nH

RF OUT

Vref = 2.085 Vdc

1000 pF

7−STEP DESIGN PROCEDURE

Step 1: Choose VCC (1.8 V Min to 10 V Max)

Step 2: Insure that Min VENBL is ≥ minimum indicated in Figures 5 and 6.

Step 3: Choose bias current, ID, and determine needed gate−source voltage, VGS.

Step 4: Choose Iout keeping in mind that too large an Iout can impair MDC5000 DVref/DTJ

performance (Figure 2) but too large an R6 can cause IDGO & IGSO to bias on the FET.

Step 5: Calculate R6 = (VGS + EGS)Iout

Step 6: From Figure 1, read Vref for VCC & Iout chosen

Step 7: Calculate Nominal R5 = (VCC − Vref)(ID + Iout). Tweak as desired.

RFC

R5

43 W

+

R6

22 K

EGS

5 Vdc

MDC5001

VCC (4)

GND (2) & (3)

Q1

Q2

+

VCC =

2.75 V

Q4

Vref (6)

Iout (1)

ENABLE

(5)

VENBL

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