TRW-24G datasheet(10/59 Pages) ETC2

Part #	TRW-24G

Description	wireless high frequency transceiver module

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TRW-24G Datasheet P.10

Table 2 Configuration data word

The MSB bit should be loaded first into the configuration register.

Default configuration word: h8E08.1C20.2000.0000.00E7.0000.0000.E721.0F04.

5.2 ShockBurst

TM configuration

The section B[119:16] contains the segments of the configuration register dedicated to

ShockBurst

TM

operational prot ocol. After VDD is turned on S hockBurst

TM

configuration is done

once and remains set whilst VDD is present, during operation only the first byte for frequency

channel and RX/TX switching need to be changed.

PLL_CTRL

PLL CTRL

D121

D120

PLL

0

Open Tx / Closed Rx

0

1

Open Tx / Open Rx

1

0

Closed Tx / Closed Rx

1

Closed Tx / Open Rx

Table 3 PLL setting

Bit 121-120:

PLL_CTRL: Controls the setting of the PLL for test purposes. With closed PLL in TX

no deviation will be present.

For normal operational mode these two

bits must both be low.

DATAx_W

Table 4 Number of bits in payload

Bit 119-112:

DATA2_W: Length of RF package payload section for receive-channel 2.

Bit 111-104:

DATA1_W: Length of RF package payload section for receive-channel 1.

DATA2_W

119

118

117

116

115

114

113

112

DATA1_W

111

110

109

108

107

106

105

104

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