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NCL30088DDR2G Datasheet(PDF) 6 Page - ON Semiconductor |
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NCL30088DDR2G Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 26 page NCL30088 www.onsemi.com 6 Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V, VZCD = 0 V, VCS = 0 V, VSD = 1.5 V) For min/max values TJ = −40°C to +125°C, VCC = 12 V) Description Unit Max Typ Min Symbol Test Condition CURRENT SENSE Propagation delay from current detection to gate off−state tILIM − 100 150 ns Maximum on−time ton(MAX) 26 36 46 ms Threshold for immediate fault protection activation VCS(stop) 1.35 1.50 1.65 V Leading Edge Blanking Duration for VCS(stop) tBCS − 150 − ns Current source for CS to GND short detection ICS(short) 400 500 600 mA Current sense threshold for CS to GND short de- tection VCS rising VCS(low) 30 65 100 mV GATE DRIVE Drive Resistance DRV Sink DRV Source RSNK RSRC − − 13 30 − − W Drive current capability DRV Sink (Note 6) DRV Source (Note 6) ISNK ISRC − − 500 300 − − mA Rise Time (10% to 90%) CDRV = 470 pF tr – 40 − ns Fall Time (90% to 10%) CDRV = 470 pF tf – 30 − ns DRV Low Voltage VCC = VCC(off)+0.2 V CDRV = 470 pF, RDRV=33 kW VDRV(low) 8 – − V DRV High Voltage VCC = VCC(MAX) CDRV = 470 pF, RDRV=33 kW VDRV(high) 10 12 14 V ZERO VOLTAGE DETECTION CIRCUIT Upper ZCD threshold voltage VZCD rising VZCD(rising) − 90 150 mV Lower ZCD threshold voltage VZCD falling VZCD(falling) 35 55 − mV ZCD hysteresis VZCD(HYS) 15 − − mV Propagation Delay from valley detection to DRV high VZCD falling TDEM − 100 300 ns Blanking delay after on−time TZCD(blank1) 1.12 1.50 1.88 ms Timeout after last DEMAG transition TTIMO 5.0 6.5 8.0 ms Pulling−down resistor VZCD = VZCD(falling) RZCD(PD) − 200 − k W CONSTANT CURRENT AND POWER FACTOR CONTROL Reference Voltage at TJ = 25°C A and B versions C and D versions VREF 245 195 250 200 255 205 mV Reference Voltage TJ = 25°C to 100°C A and B versions C and D versions VREF 242.5 192.5 250.0 200.0 257.5 207.5 mV Reference Voltage TJ = −40°C to 125°C A and B versions C and D versions VREF 240 190 250 200 260 210 mV Current sense lower threshold VCS falling VCS(low) 20 55 100 mV Vcontrol to current setpoint division ratio Vratio − 4 − − Error amplifier gain VREFX=VREF GEA 40 50 60 mS Error amplifier current capability VREFX=VREF IEA ±60 mA 6. Guaranteed by Design 7. A NTC is generally placed between the SD and GND pins. Parameters RTF(start), RTF(stop), ROTP(off) and ROTP(on) give the resistance the NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after an OTP situation. 8. At startup, when VCC reaches VCC(on), the controller blanks OTP for more than 250 ms to avoid detecting an OTP fault by allowing the SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin. |
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