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NTMFS4825NFET3G Datasheet(PDF) 5 Page - ON Semiconductor |
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NTMFS4825NFET3G Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 6 page NTMFS4825NFE http://onsemi.com 5 TYPICAL PERFORMANCE CURVES VGS = 20 V Single Pulse TC = 25°C 08 16 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 7. Capacitance Variation 6000 0 4 TJ = 25°C Coss Crss Ciss Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 0 4 0 QG, TOTAL GATE CHARGE (nC) 2 8 40 ID = 30 A TJ = 25°C VDD = 15 V QT 50 0 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance RG, GATE RESISTANCE (W) 1 10 100 1000 VGS = 0 V Figure 10. Diode Forward Voltage vs. Current 100 0.2 0.4 5 10 15 1 0.6 0.8 20 30 25 TJ = 25°C Figure 11. Maximum Rated Forward Biased Safe Operating Area 0.1 1 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 10 10 20 1 100 0 25 TJ, STARTING JUNCTION TEMPERATURE (°C) ID = 50 A Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature 50 75 50 200 300 100 125 350 150 1000 100 28 8000 5000 4000 3000 2000 0.1 6 20 10 30 80 70 60 Qgs 7000 VGS = 0 V 11 Qgd 0.01 0.1 150 250 400 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 10 ms 100 ms 1 ms 10 ms dc 0.3 0.5 0.7 10 VDD = 15 V ID = 15 A VGS = 10 V td(off) td(on) tf tr 1 10 3 5 7 9 12 24 |
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