STK681-332-E

No. A1591-6/14

Sample Application Circuit

Motor Drive Conditions

(H: High-level input; L: Low-Level Input)

IN1

IN2

ENABLE

Remarks

Stop

H

L

L

Turns the power supply OFF.

ENABLE must be set Low when VDD is rising

or falling.

L

H

L

H

H

L

Forward (CW)

H

L

H

No input signal is needed that turns off the

upper- and lower-side drive devices when

switching the rotational direction.

Reverse (CCW)

L

H

H

Brake

L

L

L or H

GND side MOSFET ON

H

H

H

VCC side MOSFET ON

* Output control is enabled by applying an external PWM signal to the ENABLE pin.

The product can run at a minimum external PWM pulse width of 1

s. In the case when the high pulse width is less

than 16

s, however, the IC may fail to detect a short-circuit condition when an output short-circuit occurs.

If VDD is turned off in the condition with the ENABLE pin set to high during motor rotation or PWM operation, the

FAULT signal is output when VDD is falling, indicating error condition. For this reason, ENABLE must be set to low

when VDD is rising or falling.

When both IN1 and IN2 are set low, the MOSFET on the VCC side is driven. To minimize the loss when stopped, set

IN1 = IN2 = High and ENABLE = Low to turn off the gate signal to the VCC side MOSFETs.

Setting the current limit using the Vref pin

Output current peak (Iop) = (Vref

 4.9)  Rs

“4.9” in the above formula indicates the portion of the Vref voltage that is divided using the circuit inside the control

IC.

Vref = (R2

 (R1+R2))  VDD

Rs is the external current detection resistance value of the HIC, and Vref ≤ 2.0V must be satisfied so that overcurrent

detection is not triggered.

15

16

17

18

13

19

9

7

8

12

6

4

10

3

2

14

VDD (5V)

IN1

IN2

ENABLE

(DC or PWM)

Vref

S.GND

GND

N.C

Motor

VCC=24V

OUT1

OUT2

C1

47

F to /50V

10

F/50V

C2

STK681-332-E

CCW

CW

11

5

N.C

1

FAULT

Rs

R1

R2

C3

0.1

F

N.C