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BELASIGNA250 Datasheet(PDF) 1 Page - ON Semiconductor |
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BELASIGNA250 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 30 page © Semiconductor Components Industries, LLC, 2015 January, 2015 − Rev. 10 1 Publication Order Number: B250/D BELASIGNA 250 High-Performance Programmable Audio Processing System Introduction BELASIGNA® 250 is a complete programmable audio processing system, designed specifically for ultra−low−power embedded and portable digital audio systems. This high−performance chip builds on the architecture and design of BELASIGNA 200 to deliver exceptional sound quality along with unmatched flexibility. BELASIGNA 250 incorporates a full audio signal chain, from stereo 16−bit A/D converters or digital interfaces to accept the signal, through the fully flexible digital processing architecture, to stereo analog line−level or direct digital power outputs that can connect directly to speakers. BELASIGNA 250 features flexible clocking options and smart power management features including a soft power−down mode. Two DSP subsystems operate concurrently: the RCore, which is a fully software programmable DSP core, and the weighted overlap−add (WOLA) filterbank coprocessor, which is a dedicated, configurable processor that executes time−frequency domain transforms and other vector− based computations. A full range of other hardware−assisted features, such as audio−targeted DMA complete the system. A comprehensive and easy−to−use suite of development tools, hands−on training and full technical support are available to enable rapid development and introduction of highly differentiated products in record time. Key Features • Unique Parallel−processing Architecture: A Complete DSP−based, Mixed−signal Audio System Consisting of a 16−bit Fully Programmable Dual−Harvard 16−bit DSP Core, a Patented, High−resolution Block Floating−point WOLA Filterbank Coprocessor, and an Input/Output Processor (IOP) along with Several Peripherals and Interfaces which Optimize the Architecture for Audio Processing • Integrated Converters and Powered Output: Minimize Need for External Components • Ultra−low Power Consumption: Under 5 mA at 20 MHz to Support Advanced Operations; 1.8 V Supply Voltage • “Smart” Power Management: Including Low Current Standby Mode Requiring Only 0.05 mA • Flexible Clocking Architecture: Supports Speeds up to 50 MHz • Full Range of Configurable Interfaces: Including: I2S, PCM, UART, SPI, I2C, TWSS, GPIO • Excellent Fidelity: 88 dB System Dynamic Range, Exceptionally Low System Noise and Low Group Delay • Support for IP Protection: to Prevent Unauthorized Access to Algorithms and Data • Available in CABGA and LFBGA Package Options • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com LFBGA−64 7x7 CASE 566AF MARKING DIAGRAMS CABGA−57 5x5 CASE 566AA See detailed ordering and shipping information in the package dimensions section on page 28 of this data sheet. ORDERING INFORMATION 0W888−002 = 64 LFBGA Option 0W633 = 57 CABGA Option XXXX = Date Code Y = Assembly Plant Identifier ZZ = Traceability Code AAAA = Country of Assembly XXXXYZZ BELASIGNA 250 0W888−002 AAAA XXXXYZZ B−250 0W633 AAAA |
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