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NCP3800VMNTXG Datasheet(PDF) 8 Page - ON Semiconductor |
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NCP3800VMNTXG Datasheet(HTML) 8 Page - ON Semiconductor |
8 / 15 page NCP3800V http://onsemi.com 8 Circuit Descriptions Soft−start This chip has two soft−start circuits built in to its circuitry to limit the inrush current and the reduce overshoot of the system. When the adaptor is first plugged into the system, charge has not started. The voltage of ACFET pin rises over a period of several ms to slow the turn on of the system FET(s). The ACFET−FETCS voltage remains around turn−on threshold allowing the FET(s) Qac and Qrb working in their saturation region. The Cgs and Cgd capacitance of the external adaptor FETs need to be carefully selected to control this soft turn−on slew rate. The output voltage of the n−channel FET will then follow in a linear manner at a gate threshold voltage below the voltage on the ACFET gate pin. After the external FETs are fully turned on and every time charge is enabled, the charger automatically steps the charge current up softly in 128 mA increments in a fixed time step until it reaches to the charge limit current. This charge current soft start makes sure the battery energized in its safe manner. Current Regulators There are two current monitors required for this chip. The resistor Rso measures the charge current into the battery. The full−scale limit for this shunt resistor is 80 mV and can be reduced in 0.64 mV steps. A highly accurate amplifier detects the voltage across the shunt resistor. The actual current level is dependent on the value of the Rso, eg. 10 m W. The Rss resistor monitors the adaptor input current. It has a full scale reading of 80 mV and can be reduced in 1.28 mV steps. Either the adaptor current or charge current information is available at the ICM pin with 20x or 40x ratio, this is programmable from the ChargeOption() register. If the total adaptor input current reaches its programmed level, the reference for the charging current will be reduced by an appropriate amount to maintain a constant level for the system current. If the battery voltage drops below BATLOWV voltage, the charger will enter a trickle charge cycle: it will reduce the current level to 128 mA and then soft start to 0.5 A (Rso = 10 m W) when the BATLOWV condition persists. This can last for 1 ms and the charge will stop for 4~5 ms, and then charge will restart with another BATLOWV trickle cycle. Once the battery voltage is over BATLOWV voltage, the softstart will continues and go into the normal charge cycle. Gate Drive Regulator and LDO The VDDP LDO can source a minimum 40 mA to the charge pump gate drive circuitry and for the high and low−side gates. It also power the rest of logic circuit while the adapter is present. A bypass capacitor larger than 0.1 ms should be applied to the VDDP output for the stability. Adaptor Detection The ACIN pin monitors the DC output of the ac adaptor or the battery pack and allows the system to turn on when sufficient voltage is present. The DCIN pin is also monitored and when the voltage is at 6.4 volts or greater, the internal circuits will become energized. When the voltage at the ACIN pin is over 0.6 V wakeup level, the internal LDO will start working with a valid VDDP output. SMbus circuit will be ready to communicate with host controller. But ACOK pin remains low indicating adaptor is not ready. When the voltage at the ACIN pin reaches 2.00 volts, DCIN−CSON>275 mV and the deglitch time (175 ms or 1.4 s) is over, all functions are enabled, including all the comparators, amplifiers, charge pump and gate drivers to the external switches. The ACOK pin changes to a high state to indicate that the adaptor is present and has sufficient voltage to allow proper operation. The charge pump circuit ramps the gate to source voltage (ACFET−FETCS) up on external adaptor FETs until their gate voltage reaches the full scale voltage and the FETs are fully on. The external FETs can be one or two back−to−back N channel FETs. When the ACIN voltage is over 2.625 V, it is considered as overvoltage condition for the adapter input, ACOK will changes to a low state and ACFET will be pulled down. PWM Control Circuit The control circuit for the NCP3800V is a fixed frequency, current mode control PWM. At light loads, the propagation delays of the controller and gate drive will tend to overcharge the battery. In the event that the battery charge voltage exceeds the set point by several milivolts, the comp signal will go low. When this occurs the oscillator will not trigger the gate drive and the drive will remain off until the comp pin moves up to regulation range. This reduces the switching frequency and improves efficiency. In order to let the boost cap to have enough charge for the next high side turn on event, a detection circuit has been implemented once the BST to phase node voltage is less than 4.0 V. Once it is detected, low side FET will be turned on to charge the boost cap voltage up. Battery Overvoltage Protection The overvoltage protection circuit monitors the output voltage and if it exceeds the set point by 4% for more than 1 ms, the drive will be removed from both the upper and lower FETs. An internal current source will be turned on to discharge the output. If OVP lasts for over 30 ms, charge controller will be latched off, it will remain off until the power is recycled. Adaptor Overvoltage Protection If ACIN voltage is higher than 2.625 V, it is considered as adaptor over voltage. ACOK will be pulled low and charge will be disabled. ACFET will be turned off to disconnect the adaptor from the system and charge circuit. BATFET will be turned on instead if a valid battery input is presented. |
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