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ED382R517-2G4SA-H9R Datasheet(PDF) 9 Page - Eorex Corporation |
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ED382R517-2G4SA-H9R Datasheet(HTML) 9 Page - Eorex Corporation |
9 / 51 page eorex ED382R517-2G4SA-H9R 9 www.eorex.com Symbol Parameter Conditions DDR3-800 1066/1333 DDR3-1600 Unit Min Max Min Max fclock Input clock fre- quency Application fre- 300 670 300 810 Mhz fTEST Input clock fre- Test frequency 70 300 70 300 Mhz tSU Setup time Input valid before 100 - 50 - ps tH Hold time Input to remain valid after CK/CK 175 - 125 - ps tPDM Propagation delay, single-bit switching CK/CK to output 0.65 1.0 0.65 1.0 ns tDIS Output disable time (1/2-Clock prelaunch) Yn/Yn to output float 0.5 + tQSK1(min) - 0.5 + tQSK1(min) - ps tEN Output enable time (1/2-Clock prelaunch) Output driving to Yn/Yn 0.5 - tQSK1(max) - 0.5 - tQSK1(max) - ps Registering Clock Driver Specifications Capacitance Values Symbol Parameter Conditions Min Typ Max Unit CI Input capacitance, Data inputs 1.5 - 2.5 pF Input capacitance, CK, CK, FBIN, FBIN (up to DDR3-1600) 1.5 - 2.5 pF CIR Input capacitance, RESET, MIRROR, QCSEN VI = VDD or GND; VDD = 1.5v - - 3 pF Input & Output Timing Requirements quency quency CK/CK |
Similar Part No. - ED382R517-2G4SA-H9R_15 |
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Similar Description - ED382R517-2G4SA-H9R_15 |
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