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EM47FM0888MBA Datasheet(PDF) 9 Page - Eorex Corporation |
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EM47FM0888MBA Datasheet(HTML) 9 Page - Eorex Corporation |
9 / 38 page - Allowed time before ringback (tDVAC) for CK - /CK and DQS - /DQS EM47FM0888MBA Differential swing requirements for clock (CK - /CK) and strobe (DQS - /DQS) Single-ended requirements for differential signals Each individual component of a differential signal (CK, DQS, /CK, /DQS) has also to comply with certain requirements for single-ended signals. CK and /CK have to approximately reach VSEHmin / VSELmax (approximately equal to the ac-levels (VIH(AC) / VIL(AC) ) for Address/Command signals) in every half-cycle. DQS, /DQS have to reach VSEHmin / VSELmax [approximately the ac-levels (VIH(AC) / VIL(AC) ) for DQ signals] in every half-cycle preceding and following a valid transition. Note that the applicable AC-levels for Address/Command and DQ‟s might be different per speed-bin etc. E.g., if VIHCA(AC150)/VILCA(AC150) is used for Address/Command signals, then these AC-levels apply also for the single-ended components of differential CK and /CK. Apr. 2014 9/38 www.eorex.com Slew Rate [V/ns] tDVAC [ps] @ |VIH/Ldiff(ac)| = 350mV tDVAC [ps] @ |VIH/Ldiff(ac)| = 300mV - Min Max Min Max >4.0 75 - 175 - 4.0 57 - 170 - 3.0 50 - 167 - 2.0 38 - 163 - 1.8 34 - 162 - 1.6 29 - 161 - 1.4 22 - 159 - 1.2 13 - 155 - 1.0 0 - 150 - <1.0 0 - 150 - |
Similar Part No. - EM47FM0888MBA_15 |
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Similar Description - EM47FM0888MBA_15 |
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