EM484M3244VBE_15 datasheet(4/18 Pages) EOREX

Part #	EM484M3244VBE

Description	Synchronous DRAM

Download	18 Pages

Scroll/Zoom	100%

Manufacturer	EOREX [Eorex Corporation]

Direct Link	http://www.eorex.com

Logo

4 / 18 page

Pin Description (Simplified)

eorex

EM484M3244VBE

Dec. 2013

www.eorex.com

4/18

Name

Function

J1

CLK

(System Clock)

Master clock input (Active on the positive rising edge)

J8

/CS

(Chip Select)

Selects chip when active

J2

CKE

(Clock Enable)

Activates the CLK when

“H” and deactivates when “L”.

CKE should be enabled at least one cycle prior to new

command. Disable input buffers for power down in standby.

G8,G9,F7,F3,G1,

G2,G3,H1,H2,J3,

G7,H9

A0~A11

(Address)

Row address (A0 to A11) is determined by A0 to A11 level at

the bank active command cycle CLK rising edge.

CA (CA0 to CA7) is determined by A0 to A7 level at the read or

write command cycle CLK rising edge.

And this column address becomes burst access start address.

A10 defines the pre-charge mode. When A10= High at the

pre-charge command cycle, all banks are pre-charged.

But when A10= Low at the pre-charge command cycle, only the

bank that is selected by BA is pre-charged.

J7,H8

BA0,BA1

(Bank Address)

Selects which bank is to be active.

J9

/RAS

(Row Address Strobe)

Latches Row Addresses on the positive rising edge of the CLK

with /RAS

“L”. Enables row access & pre-charge.

K7

/CAS

(Column Address Strobe)

Latches Column Addresses on the positive rising edge of the

CLK with /CAS low. Enables column access.

K8

/WE

(Write Enable)

Latches Column Addresses on the positive rising edge of the

CLK with /CAS low. Enables column access.

K9,K1,F8,F2

DQM0~DQM3

(Data Input/Output Mask)

DQM controls I/O buffers.

R8,N7,R9,N8,P9,

M8,M7,L8,L2,M3,

M2,P1,N2,R1,N3,

R2,E8,D7,D8,B9,

C8,A9,C7,A8,A2,

C3,A1,C2,B1,D2,

D3,E2

DQ0~DQ31

(Data Input/Output)

DQ pins have the same function as I/O pins on a conventional

DRAM.

A7,F9,L7,R7/

A3,F1,L3,R3

VDD/VSS

(Power Supply/Ground)

VDD and VSS are power supply pins for internal circuits.

B2,B7,C9,D9,E1,

L1,M9,N9,P2/B8,

B3,C1,D1,E9,L9,

M1,N1,P8

VDDQ/VSSQ

(Power Supply/Ground)

VDDQ and VSSQ are power supply pins for the output buffers.

E3,E7,H3,H7,K2,

K3

NC

(No Connection)

This pin is recommended to be left No Connection on the

device.

Similar Part No. - EM484M3244VBE_15

Manufacturer	Part #	Datasheet	Description
Eorex Corporation	EM484M3244VBE-75F	1Mb / 18P	Programmable CAS Latency
Eorex Corporation	EM484M3244VBE-75FE	1Mb / 18P	Programmable CAS Latency

More results

Similar Description - EM484M3244VBE_15

Manufacturer	Part #	Datasheet	Description
Micron Technology	MT48LC64M4A2	1Mb / 62P	SYNCHRONOUS DRAM
Micron Technology	MT48LC32M4A1	3Mb / 51P	SYNCHRONOUS DRAM
Eorex Corporation	EM482M3244VTB	1Mb / 17P	Synchronous DRAM
	EM488M1644VTG	1Mb / 18P	Synchronous DRAM
	EM48AM1684VBE	1Mb / 17P	Synchronous DRAM
	EM484M1644VTC	199Kb / 17P	Synchronous DRAM
	EM484M1644VTD	1Mb / 18P	Synchronous DRAM
	EM488M3244VBD	1Mb / 18P	Synchronous DRAM
Alliance Semiconductor ...	AS4C4M16SA	1Mb / 54P	Synchronous DRAM
Micron Technology	MT48LC16M4A2	1Mb / 55P	SYNCHRONOUS DRAM
Micron Technology	MT48LC1M16A1	1Mb / 51P	SYNCHRONOUS DRAM

More results

EM484M3244VBE Datasheet(PDF) 4 Page - Eorex Corporation

EM484M3244VBE Datasheet(HTML) 4 Page - Eorex Corporation

Similar Part No. - EM484M3244VBE_15

Similar Description - EM484M3244VBE_15

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Datasheet Download

Link URL