[AK9231]

014010771-E-00

2014/12

- 7 -

8.

DC Characteristics

(Ta= -40 ~ 105ºC)

Parameter

Symbol

Min.

Max.

Unit

High-Level Input Voltage

VDD= 2.35 ~ 3.6V

VDD= 4.75 ~ 5.25V

VIH1

VIH2

1.8

2.4

-

-

V

V

Low-Level Input Voltage

VDD= 5V

VDD= 3V

VIL1

VIL2

-

-

0.8

0.4

V

V

High-Level Output Voltage (Iout = -200µA)

VOH

VDD-0.2

-

V

Low-Level Output Voltage (Iout = 200µA)

VOL

-

0.4

V

Load Capacitance

CL

30

pF

Input Leakage Current

(* 3)

Iin

-

±1

µA

Note:

* 3. Except TEST0, TEST1, TEST2 and TEST3 pins. These pins are internally pulled-down. (Typ.50k

Ω)

9.

Switching Characteristics

(Ta= -40 ~ 105ºC)

Parameter

Symbol

Min.

Typ.

Max.

Unit

SCK Clock Frequency

fSCK

20

MHz

SCK High Pulse Width

(* 4)

tSCKH

0.4 x tSCK

-

nsec

SCK Low Pulse Width

(* 4)

tSCKL

0.4 x tSCK

-

nsec

Minimum time from bus 3-state to start of next conversion

tq

40

nsec

CSN

“↓” to First SCK “↓”

tCSS

10

-

nsec

CSN

“↓” to DOUT “0” Delay

tCSD

-

25

nsec

SCK

“↓” to DOUT Valid Delay

tDCD

-

30

nsec

SCK

“↓” to DOUT Valid

Hold time

VDD= 3V

VDD= 5V

tDCH1

tDCH2

7

5.5

-

-

nsec

nsec

Minimum CS pulse

tCS

25

nsec

16th SCK

“↓” to SDO Hi-Z State

VDD= 3V

VDD= 5V

tCCZ1

tCCZ2

-

-

30

20

nsec

nsec

Note:

* 4. tSCK = 1/ fSCK

9.1. Timing Diagram

10 11

CSN

SCK

SDO

2 3 4 5 6 7 8 9

12 13 14 15 16

1

D11

D0

1/ throughput

Hi-Z

0

tq

tCS

Figure 2. Data Output Timing 1