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NCP81252MNTXG Datasheet(PDF) 11 Page - ON Semiconductor |
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NCP81252MNTXG Datasheet(HTML) 11 Page - ON Semiconductor |
11 / 18 page NCP81252 www.onsemi.com 11 DETAILED DESCRIPTION General The NCP81252, a single−phase synchronous buck regulator, integrates power MOSFETs to provide a high−efficiency and compact−footprint power management solution for new generation computing CPUs. The device is able to deliver up to 14 A TDC output current on an adjustable output with SVID interface. Operating in high switching frequency up to 1.2 MHz allows employing small size inductors and capacitors while maintaining high efficiency due to integrated solution with high performance power MOSFETs. Current−mode RPM control with feedforward from both input power supply and output voltage ensures stable operation over wide operation condition. Current−Mode RPM Operation The NCP81252 operates with the current−mode Ramp−Pulse−Modulation (RPM) scheme in PS0/1/2/3 operation modes. In forced CCM mode, the inductor current is always continuous and the device operates in quasi−fixed switching frequency, which has a typical value programmed by users through a resistor at pin FREQ. In auto CCM/DCM mode, the inductor current is continuous and the device operates in quasi−fixed switching frequency in medium and heavy load range, while the inductor current becomes discontinuous and the device automatically operates in PFM mode with an adaptive fixed on time and variable switching frequency in light load range. Serial VID interface (SVID) The NCP81252 supports Intel serial VID interface. It communicates with the microprocessor through three wires (SCLK, SDIO, ALERT#). For NCP81252, VID code change rate is controlled by the SVID interface with three options. Information regarding SVID interface can be obtained from Intel. Boot Voltage and SVID Address Table 5 shows two boot voltage options of 0.9 V and 1.35 V programmed by an external 1% resistor Rvboot from Vboot pin to GND, which programs SVID address as well. Both values are set on power up and cannot be changed after the initial power up sequence is complete. Table 5. BOOT VOLTAGE AND SVID ADDRESS CONFIGURATION Rvboot ( W) Vboot Pin Voltage (mV) Address Vboot (V) Min Typ Max 0 0 0 102 0x0 0.9 14 .0k 102 140 180 0x1 0.9 22.1 k 180 219 258 0x2 0.9 30.1 k 258 301 344 0x3 0.9 39.2 k 344 391 438 0x4 0.9 48.7 k 438 484 531 0x5 0.9 57.6 k 531 578 625 0x6 0.9 68.1 k 625 676 727 0x7 0.9 78.7 k 727 781 836 0x8 0.9 88.7 k 836 894 953 0x0 1.35 100 k 953 1007 1062 0x1 1.35 113 k 1062 1125 1188 0x2 1.35 124 k 1188 1250 1312 0x3 1.35 137 k 1312 1378 1445 0x4 1.35 150 k 1445 1511 1578 0x5 1.35 165 k 1578 1648 1719 0x6 1.35 178 k 1719 1789 1859 0x7 1.35 196 k 1859 1950 − 0x8 1.35 |
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