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PCS3P2189A Datasheet(PDF) 2 Page - ON Semiconductor |
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PCS3P2189A Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 6 page PCS3P2189A http://onsemi.com 2 Figure 1. Block Diagram VSS VDD PLL Loop Filter VCO ModOUT Output Divider S0 S1 SSON Phase Detector Modulation Frequency Divider Feedback Divider Crystal Oscillator XOUT CLKIN / XIN Table 1. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Unit VDD Supply Voltage pin with respect to Ground −0.5 to +4.6 V VIN Input Voltage pin with respect to Ground VSS−0.5 to VDD+0.5 V VOUT Output Voltage pin with respect to Ground VSS−0.5 to VDD+0.5 V TSTG Storage temperature −55 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22− A114−B) 2 KV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 2. PIN DESCRIPTION Pin# Pin Name Type Description 1 CLKIN / XIN I Crystal connection or External reference Clock Input 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 SSON I Modulation enables pin. When HIGH enables spread spectrum modulation. Has an Internal pull up resistor 4 S1 I Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Table). This pin has an internal pull−up resistor. 5 S0 O Spread range select. Digital logic input used to select frequency deviation (Refer Spread Deviation Table). This pin has an internal pull−up resistor. 6 VSS P Ground Connection. Connect to system ground. 7 ModOUT O Low EMI 4x clock output. 8 VDD P Power Supply Voltage Pin. Connect to +3.3 V. |
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