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TCC-206 Datasheet(PDF) 6 Page - ON Semiconductor

Part # TCC-206
Description  Six-Output PTIC Control IC
Download  33 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

TCC-206 Datasheet(HTML) 6 Page - ON Semiconductor

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TCC−206
www.onsemi.com
6
THEORY OF OPERATION
Overview
The control IC outputs are directly controlled by
programming the six DACs (DAC A, DAC B, DAC C, DAC
D, DAC E and DAC F) through the digital interface.
The DAC stages are driven from a reference voltage,
generating an analog output voltage driving a high−voltage
amplifier supplied from the boost converter (see Figure 1 −
Control IC Functional Block Diagram).
The control IC output voltages are scaled from 0 V to
24 V, with 128 steps of 188 mV ((2 x 24 / 255 V) =
0.188235 V). The nominal control IC output can be
approximated to 188 mV x (DAC value).
For performance optimization the boost output voltage
(VHV) can be programmed to levels between 13 V and 28 V
via the DAC_boost register (4 bits with 1 V steps). The
startup default level for the boosted voltage is VHV = 24 V.
For proper operation and to avoid saturation of the output
devices and noise issues it is recommended to operate the
boosted VHV voltage at least 2 V above the highest
programmed VOUT voltage of any of the six outputs.
Operating Modes
The following operating modes are available:
1. Shutdown Mode: All circuit blocks are off, the
DAC outputs are disabled and placed in high Z
state and current consumption is limited to
minimal leakage current. The shutdown mode is
entered upon initial application of AVDD or upon
VIO being placed in the low state. The contents of
the registers are not maintained in shutdown mode.
2. Startup Mode: Startup is only a transitory mode.
Startup mode is entered upon a VIO high state. In
startup mode all registers are reset to their default
states, the digital interface is functional, the boost
converter is activated, outputs OUT A, OUT B,
OUT C, OUT D, OUT E and OUT F are disabled
and the DAC outputs are placed in a high Z state.
Control software can request a full hardware and
register reset of the TCC−206 by sending an
appropriate PWR_MODE command to direct the
chip from either the active mode or the low power
mode to the startup mode. From the startup mode
the device automatically proceeds to the active mode.
3. Active Mode: All blocks of the TCC−206 are
activated and the DAC outputs are fully controlled
through the digital interface, DACs remain off
until enabled. The DAC settings can be
dynamically modified and the HV outputs will be
adjusted according to the specified timing
diagrams. Each DAC can be individually
controlled and/or switched off according to
application requirements. Active mode is
automatically entered from the startup mode.
Active mode can also be entered from the low
power mode under control software command.
4. Low Power Mode: In low power mode the serial
interface stays enabled, the DAC outputs are
disabled and are placed in a high Z state and the
boost voltage circuit is disabled. Control software
can request to enter the low power mode from the
active mode by sending an appropriate
PWR_MODE command. The contents of all
registers are maintained in the low power mode.
Shutdown
Startup
(Registers reset)
Active
Low Power
(User Defined)
PWR_MODE = 0b10
VDDA = 0
Figure 3. Modes of Operation
Battery insertion
(User Defined)
PWR_MODE =
0b01
automatic
VIO = HIGH
VIO = LOW
VIO = LOW
PWR_MODE = 0b00
PWR_MODE =
0b01


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