LE24512AQF

No.A2087-5/14

Bus Timing

Write Timing

Pin Functions

SCL (serial clock input) pin

The SCL signal is used to control serial input data timing. The SCL is used to latch input data synchronously at the

rising edge and read output data synchronously at the falling edge.

SDA (serial data input/output) pin

The SDA pin is bidirectional for serial data transfer. It is an open-drain structure that needs to be pulled up by resistor.

WP (write protect) pin

When the WP signal is high, write protection are enabled. When this signal is low, write operations for all memory

arrays are allowed. The read operation is always activated irrespective of the WP pin status.

S0/S1/S2 (Slave Address) pin

When many devices are connected on the same bus, the S0/S1/S2 are used to select the device.

The S0/S1/S2 must be tied to VDD or GND

SCL

SDA

D0

tWC

Write data

Acknowledge

Stop

condition

Start

condition

SCL

SDA/IN

SDA/OUT

tF

tSU.STA

tHD.STA

tAA

tHIGH

tLOW

tHD.DAT

tSU.DAT

tDH

tR

tSU.STO

tSP

tBUF

tSP