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THS3122CD Datasheet(PDF) 7 Page - Texas Instruments |
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THS3122CD Datasheet(HTML) 7 Page - Texas Instruments |
7 / 43 page THS3122, THS3125 www.ti.com SLOS382E – SEPTEMBER 2001 – REVISED MAY 2015 7.9 Electrical Characteristics: Power Supply Over operating free-air temperature range, TA = +25°C, VCC = ±15 V, RF = 750 Ω, and RL = 100 Ω (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = +25°C 7.2 9 mA VCC = ±5 V TA = full range 10 mA ICC Quiescent current (per channel) TA = +25°C 8.4 10.5 mA VCC = ±15 V TA = full range 11.5 mA TA = +25°C 53 60 dB VCC = ±5 V ±1 V TA = full range 50 dB PSRR Power-supply rejection ratio TA = +25°C 60 69 dB VCC = ±15 V ±1 V TA = full range 55 dB 7.10 Electrical Characteristics: Shutdown Characteristics (THS3125 Only) Over operating free-air temperature range, TA = +25°C, VCC = ±15 V, RF = 750 Ω, and RL = 100 Ω (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ICC(SHDN) Shutdown quiescent current (per channel) REF = 0 V, VCC= ±5 V to ±15 V VSHDN = 3.3 V 370 500 µA tDIS Disable time (1) REF = 0 V, VCC= ±5 V to ±15 V 500 µs tEN Enable time(1) REF = 0 V, VCC= ±5 V to ±15 V 200 µs IIL(SHDN) Shutdown pin low level leakage current REF = 0 V, VCC= ±5 V to ±15 V VSHDN = 0 V 18 25 µA IIH(SHDN) Shutdown pin high level leakage current REF = 0 V, VCC= ±5 V to ±15 V VSHDN = 3.3 V 110 130 µA VREF REF pin voltage level VCC– VCC+ – 4 V Enable REF + 0.8 V VSHDN SHUTDOWN pin voltage level Disable REF + 2 V (1) Disable and enable times are defined as the time from when the shutdown signal is applied to the SHDN pin to when the supply current has reached half of its final value. 7.11 Typical Characteristics: Table Of Graphs TITLE FIGURE Small-signal closed-loop gain vs Frequency Figure 1 to Figure 10 Small- and large-signal output vs Frequency Figure 11, Figure 12 vs Frequency Figure 13 to Figure 15 Harmonic distortion vs Peak-to-peak output voltage Figure 16, Figure 17 Vn, In Voltage noise and current noise vs Frequency Figure 18 CMRR Common-mode rejection ratio vs Frequency Figure 19 Crosstalk vs Frequency Figure 20 Zo Output impedance vs Frequency Figure 21 SR Slew rate vs Output voltage step Figure 22 vs Free-air temperature Figure 24 VIO Input offset voltage vs Common-mode input voltage Figure 24 IB Input bias current vs Free-air temperature Figure 25 VO Output voltage vs Load current Figure 26 vs Free-air temperature Figure 27 Quiescent current vs Supply voltage Figure 28 ICC Shutdown supply current vs Free-air temperature Figure 29 Differential gain and phase error vs 75- Ω serially terminated loads Figure 30, Figure 31 Shutdown response Figure 32 Small-signal pulse response Figure 33, Figure 34 Large-signal pulse response Figure 35, Figure 36 Copyright © 2001–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: THS3122 THS3125 |
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