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Z86C30 Datasheet(PDF) 11 Page - Zilog, Inc. |
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Z86C30 Datasheet(HTML) 11 Page - Zilog, Inc. |
11 / 17 page CP96DZ82900 11 Z86C30/C31/C32/C40 CP96DZ82900 ZILOG DC ELECTRICAL CHARACTERISTICS (Continued) T A = –40°C Typical [1] V CC to 105 °C@ Sym Parameter Note [3] Min Max 25 °C Units Conditions Notes I CC1 Standby Current 3.0V 4.5 2.0 mA V IN = 0V, VCC @ 16 MHz [4,5] (Halt Mode) 5.5V 8 3.7 mA V IN = 0V, VCC @ 16 MHz [4,5] 3.0V 4 1.5 mA V IN = 0V, VCC @ 12 MHz [4,5] 5.5V 6 3.2 mA V IN = 0V, VCC @ 12 MHz [4,5] 3.0V 3.4 1.5 mA Clock Divide by 16 @ 16 MHz [4,5] 5.5V 7.0 2.9 mA Clock Divide by 16 @ 16 MHz [4,5] 3.0V 3 1.2 mA Clock Divide by 16 @ 12 MHz [4,5] 5.5V 5 2.5 mA Clock Divide by 16 @ 12 MHz [4,5] I CC2 Standby Current 3.0V 8 2 µAV IN = OV, VCC [6,11] (Stop Mode) WDT is not Running 5.5V 10 4 µAV IN = OV, VCC [6,11] WDT is not Running 3.0V 600 310 µAV IN = OV, VCC [6,11] WDT is Running 5.5V 1000 600 µAV IN = OV, VCC [6,11] WDT is Running I ALL Auto Latch Low Current 3.0V 0.7 10 2.4 µA OV < V IN < VCC [9] 5.5V 1.4 20 4.7 µA OV < V IN < VCC [9] I ALH Auto Latch High Current 3.0V –0.6 –7 –1.8 µA OV < V IN < VCC [9] 5.5V –1.0 –10 –3.8 µA OV < V IN < VCC [9] T POR Power On Reset 3.0V 3.0 25 7 mS 5.5V 2.0 14 4 mS V LV Low Voltage Protection 1.8 3.3 2.6 V 4 MHz max INT CLK Freq. Note: [1] Typicals are at V CC = 5.0V and 3.3V. [2] GND=0V. [3] The V CC voltage spec. of 3.0V guarantees 3.3V ± 0.3V and the V DD voltage spec. of 5.5V guarantees 5.0V ± 0.5V. [4] All outputs unloaded, I/O pins floating, inputs at rail. [5] CL1= CL2 = 100pF. [6] Same as note [4] except inputs at V CC . [[7] Z86C40 only. [8] STD Mode (not Low EMI Mode). [9] Auto Latch (mask option) selected. [10] For analog comparator inputs when analog comparators are enabled. [11] Clock must be forced Low, when XTAL1 is clock driven and XTAL2 is floating. [7] Z86C40 only. |
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