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Z86C2112FSC Datasheet(PDF) 11 Page - Zilog, Inc. |
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Z86C2112FSC Datasheet(HTML) 11 Page - Zilog, Inc. |
11 / 35 page 11 Z86C21 MCU WITH 8K ROM Table 4. Port 3 Pin Assignments Pin I/O CTC1 Int. P0 HS P1 HS P2 HS UART Ext P30 IN IRQ3 Serial In P31 IN T IN IRQ2 D/R P32 IN IRQ0 D/R P33 IN IRQ1 D/R P34 OUT R/D DM P35 OUT R/D P36 OUT T OUT R/D P37 OUT Serial Out T0 IRQ4 T1 IRQ5 Notes: HS = Handshake Signals; D = Data Available; R = Ready Auto Latch. The Auto Latch puts valid CMOS levels on all CMOS inputs that are not externally driven. This reduces excessive supply current flow in the input buffer when it is not been driven by any source. Low EMI Option. The Z86C21 is available in a Low EMI option. This option is mask-programmable, to be selected by the customer at the time when the ROM code is submitted. Use of this feature results in: s The pre-drivers slew rate reduced to 10 ns typical. s Low EMI output drivers have resistance of 200 Ohms typical. s Oscillator divide-by-two circuitry is eliminated. s Internal SCLK/TCLK operation is limited to a maximum of 4 MHz (250 ns cycle time) P D6D5D4D3D2D1D0 Start Bit Seven Data Bits Received Data (With Parity) Parity Error Flag One Stop Bit ST SP P D6D5D4D3D2D1D0 Start Bit Seven Data Bits Transmitted Data (With Parity) Odd Parity Two Stop Bits SP SP ST D7 D6 D5 D4 D3 D2 D1 D0 Start Bit Eight Data Bits Transmitted Data (No Parity) Two Stop Bits SP SP ST D7 D6 D5 D4 D3 D2 D1 D0 Start Bit Eight Data Bits Received Data (No Parity) One Stop Bit SP ST Figure 9. Serial Data Formats |
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