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Z86C90 Datasheet(PDF) 9 Page - Zilog, Inc. |
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Z86C90 Datasheet(HTML) 9 Page - Zilog, Inc. |
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9 / 14 page  9 AC CHARACTERISTICS External I/O or Memory Read and Write Timing Table No Symbol Parameter V CC T A = 0°C to +70°CTA = -40°C to +105°C Units Notes Note[3] 8 MHz 12 MHz 8 MHz 12 MHz Min Max Min Max Min Max Min Max 1 TdA(AS) Address Valid to 3.3 55 35 55 35 ns [2] /AS Rising Delay 5.0 55 35 55 35 ns 2 TdAS(A) /AS Rising to Address 3.3 70 45 70 45 ns [2] Float Delay 5.0 70 45 70 45 ns 3 TdAS(DR) /AS Rising to Read 3.3 400 250 400 250 ns [1,2] Data Required Valid 5.0 400 250 400 250 ns 4 TwAS /AS Low Width 3.3 80 55 80 55 ns [2] 5.0 80 55 80 55 ns 5 Td Address Float to 3.3 0 0 0 0 ns /DS Falling 5.0 0 0 0 0 ns 6 TwDSR /DS (Read) Low Width 3.3 300 200 300 200 ns [1,2] 5.0 300 200 300 200 ns 7 TwDSW /DS (Write) Low Width 3.3 165 110 165 110 ns [1,2] 5.0 165 110 165 110 ns 8 TdDSR(DR) /DS Falling to Read 3.3 260 150 260 150 ns [1,2] Data Required Valid 5.0 260 160 260 160 ns 9 ThDR(DS) Read Data to 3.3 0 0 0 0 ns [2] /DS Rising Hold Time 5.0 0 0 0 0 ns 10 TdDS(A) /DS Rising to Address 3.3 85 45 85 45 ns [2] Active Delay 5.0 95 55 95 55 ns 11 TdDS(AS) /DS Rising to /AS 3.3 60 30 60 30 ns [2] Falling Delay 5.0 70 45 70 45 ns 12 TdR/W(AS) R//W Valid to /AS 3.3 70 45 70 45 ns [2] Rising Delay 5.0 70 45 70 45 ns 13 TdDS(R/W) /DS Rising to 3.3 70 45 70 45 ns [2] R//W Not Valid 5.0 70 45 70 45 ns 14 TdDW(DSW) Write Data Valid to /DS 3.3 80 55 80 55 ns [2] Falling (Write) Delay 5.0 80 55 80 55 ns 15 TdDS(DW) /DS Rising to Write 3.3 70 45 70 45 ns [2] Data Not Valid Delay 5.0 80 55 80 55 ns 16 TdA(DR) Address Valid to Read 3.3 475 310 475 310 ns [1,2] Data Required Valid 5.0 475 310 475 310 ns 17 TdAS(DS) /AS Rising to 3.3 100 65 100 65 ns [2] /DS Falling Delay 5.0 100 65 100 65 ns 18 TdDI(DS) Data Input Setup to 0.0 115 115 115 115 ns [1,2] /DS Rising 5.0 75 75 75 75 ns 19 TdDM(AS) /DM Valid to /AS 3.3 55 35 55 35 ns [2] Falling Delay 5.0 55 35 55 35 ns Notes: [1] When using extended memory timing add 2 TpC. [2] Timing numbers given are for minimum TpC. [3] 5.0V ±0.5V, 3.3V ±0.3V. Standard Test Load All timing references use 0.9 V CC for a logic 1 and 0.1 V CC for a logic 0. |
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