ATTINY15L-1SC datasheet(7/11 Pages) ATMEL

Part #	ATTINY15L-1SC

Description	8-bit AVR Microcontroller with 1K Byte Flash

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Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

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ATtiny15L

1187DS–12/01

CBI

P, b

Clear Bit in I/O Register

I/O(P,b)

← 0None

2

LSL

Rd

Logical Shift Left

Rd(n+1)

← Rd(n), Rd(0) ← 0

Z,C,N,V

1

LSR

Rd

Logical Shift Right

Rd(n)

← Rd(n+1), Rd(7) ← 0

Z,C,N,V

1

ROL

Rd

Rotate Left through Carry

Rd(0)

← C, Rd(n+1) ← Rd(n), C ← Rd(7)

Z,C,N,V

1

ROR

Rd

Rotate Right through Carry

Rd(7)

← C, Rd(n) ← Rd(n+1), C ← Rd(0)

Z,C,N,V

1

ASR

Rd

Arithmetic Shift Right

Rd(n)

← Rd(n+1), n = 0..6

Z,C,N,V

1

SWAP

Rd

Swap Nibbles

Rd(3..0)

← Rd(7..4), Rd(7..4) ← Rd(3..0)

None

1

BSET

s

Flag Set

SREG(s)

← 1

SREG(s)

1

BCLR

s

Flag Clear

SREG(s)

← 0

SREG(s)

1

BST

Rr, b

Bit Store from Register to T

T

← Rr(b)

T

1

BLD

Rd, b

Bit Load from T to Register

Rd(b)

← TNone

1

SEC

Set Carry

C

← 1C

1

CLC

Clear Carry

C

← 0C

1

SEN

Set Negative Flag

N

← 1N

1

CLN

Clear Negative Flag

N

← 0N

1

SEZ

Set Zero Flag

Z

← 1Z

1

CLZ

Clear Zero Flag

Z

← 0Z

1

SEI

Global Interrupt Enable

I

← 1I

1

CLI

Global Interrupt Disable

I

← 0I

1

SES

Set Signed Test Flag

S

← 1S

1

CLS

Clear Signed Test Flag

S

← 0S

1

SEV

Set Two’s Complement Overflow

V

← 1V

1

CLV

Clear Two’s Complement Overflow

V

← 0V

1

SET

Set T in SREG

T

← 1T

1

CLT

Clear T in SREG

T

← 0T

1

SEH

Set Half-carry Flag in SREG

H

← 1H

1

CLH

Clear Half-carry Flag in SREG

H

← 0H

1

NOP

No Operation

None

1

SLEEP

Sleep

(see specific descr. for Sleep function)

None

1

WDR

Watchdog Reset

(see specific descr. for WDR/timer)

None

1

ATtiny15L Instruction Set Summary (Continued)

Mnemonic

Operands

Description

Operation

Flags

# Clocks

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