CXK77P36E160GB / CXK77P18E160GB

Preliminary

16Mb LW R-L and 8Mb LW R-L w/ EC, rev 1.1

9 / 25

March 2, 2001

All parameters are measured from the mid-point of the object signal to the mid-point of the reference signal, unless otherwise noted.

3. These parameters are sampled and are not 100% tested.

4. These parameters are measured at

± 50mV from steady state voltage.

Parameter

Symbol

-4

-42

-43

-44

Units Notes

Min

Max

Min

Max

Min

Max

Min

Max

K Cycle Time

4.0

---

4.2

---

4.3

---

4.4

---

ns

K Clock High Pulse Width

1.5

---

1.5

---

1.5

---

1.5

---

ns

K Clock Low Pulse Width

1.5

---

1.5

---

1.5

---

1.5

---

ns

Address Setup Time

0.3

---

0.5

---

0.5

---

0.5

---

ns

1

Address Hold Time

0.5

---

0.5

---

0.5

---

0.5

---

ns

2

Write Enables Setup Time

0.3

---

0.5

---

0.5

---

0.5

---

ns

1

Write Enables Hold Time

0.5

---

0.5

---

0.5

---

0.5

---

ns

2

Synchronous Select Setup Time

0.3

---

0.5

---

0.5

---

0.5

---

ns

1

Synchronous Select Hold Time

0.5

---

0.5

---

0.5

---

0.5

---

ns

2

Data Input Setup Time

0.3

---

0.5

---

0.5

---

0.5

---

ns

1

Data Input Hold Time

0.5

---

0.5

---

0.5

---

0.5

---

ns

2

K Clock High to Output Valid

(“A” Sub-Bin)

(“B” Sub-Bin)

---

3.9

3.8

3.7

---

4.2

4.1

4.0

---

4.5

4.4

4.3

---

4.7

ns

K Clock Low to Output Valid

---

1.8

---

2.0

---

2.1

---

2.2

ns

K Clock Low to Output Hold

0.5

---

0.5

---

0.5

---

0.5

---

ns

3

K Clock Low to Output Low-Z

0.5

---

0.5

---

0.5

---

0.5

---

ns

3,4

K Clock High to Output High-Z

1.2

2.2

1.2

2.3

1.2

2.4

1.2

2.5

ns

3,4

Sleep Mode Enable Time

---

15

---

15

---

15

---

15

ns

3

Sleep Mode Recovery Time

20

---

20

---

20

---

20

---

ns

3