CXK77P36E160GB / CXK77P18E160GB

Preliminary

16Mb LW R-L and 8Mb LW R-L w/ EC, rev 1.1

5 / 25

March 2, 2001

Although M2 is defined as a static input (that is, it must be tied “high” or “low” at power-up), in some instance (such as

during device testing) it may be desirable to change its state dynamically (that is, without first powering off the SRAM)

while preserving the contents of the memory array. If so, the following criteria must be met:

1. At least two (2) consecutive deselect operations must be initiated prior to changing the state of M2, to ensure that the

most recent read or write operation completes successfully.

2. At least thirty-two (32) consecutive deselect operations must be initiated after changing the state of M2 before any read

or write operations can be initiated, to allow the SRAM sufficient time to recognize the change in state.

Sleep (power down) mode is provided through the asynchronous input signal ZZ. When ZZ is asserted (high), the output

drivers will go to a Hi-Z state, and the SRAM will begin to draw standby current. Contents of the memory array will be

These devices have programmable impedance output drivers. The output impedance is controlled by an external resistor,

the DC Electrical Characteristics section for further information.

The output impedance is updated whenever the output drivers are in a Hi-Z state. Consequently, impedance updates will

occur during write and deselect operations. At power up, 8192 clock cycles followed by an impedance update via one of

the three methods described above are required to ensure that the output impedance has reached the desired value. After

power up, periodic impedance updates via write or deselect operations are also required to ensure that the output imped-

ance remains within specified tolerances.

K

ZZ

SS

SW

SBWx

Operation

DQ

DQ

X

H

X

X

X

Sleep (Power Down) Mode

Hi - Z

Hi - Z

L

→H

L

H

X

X

Deselect

Hi - Z

X

L

→H

L

L

H

X

Read

X

L

→H

L

L

L

L

Write All Bytes

Hi - Z

L

→H

L

L

L

X

Write Bytes With SBWx = L

Hi - Z

L

→H

L

L

L

H

Abort Write

Hi - Z

X