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DRV425 Datasheet(PDF) 5 Page - Texas Instruments |
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DRV425 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 37 page  DRV425 www.ti.com SBOS729 – OCTOBER 2015 6.5 Electrical Characteristics All minimum and maximum specifications are at TA = 25°C, VDD = 3.0 V to 5.5 V, and IDRV1 = IDRV2 = 0 mA, unless otherwise noted. Typical values are at VDD = 5.0 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FLUXGATE SENSOR FRONT-END Offset No magnetic field –8 ±2 8 µT Offset drift No magnetic field ±5 nT/°C G Gain Current at DRV1 and DRV2 outputs 12.2 mA/mT Gain error ±0.04% Gain drift Best-fit line method ±7 ppm/°C Linearity error 0.1% Hysteresis Magnetic field sweep from –10 mT to 10 mT 1.4 µT Noise f = 0.1 Hz to 10 Hz 17 nTrms Noise density f = 1 kHz 1.5 nT/ √Hz Compensation range –2 2 mT Saturation trip level for the Open-loop, uncompensated field 1.6 mT ERROR pin(1) ERROR delay Open-loop at B > 1.6 mT 4 to 6 µs BSEL = 0, RSHUNT = 22 Ω 32 BW Bandwidth kHz BSEL = 1, RSHUNT = 22 Ω 47 VDD = 5 V 250 IOS Short-circuit current mA VDD = 3.3 V 150 Common-mode output voltage at the VREFOUT V DRV1 and DRV2 pins Compensation coil resistance 100 Ω SHUNT-SENSE AMPLIFIER VOO Output offset voltage VAINP = VAINN = VREFIN, VDD = 3.0 V –0.075 ±0.01 0.075 mV Output offset voltage drift –2 ±0.4 2 µV/°C CMRR Common-mode rejection ratio, RTO(2) VCM = –1 V to VDD + 1 V, VREFIN = VDD / 2 –250 ±50 250 µV/V PSRRAMP Power-supply rejection ratio, RTO(2) VDD = 3.0 V to 5.5 V, VCM = VREFIN –50 ±4 50 µV/V VICR Common-mode input voltage range –1 VDD + 1 V zid Differential input impedance 16.5 20 23.5 k Ω zic Common-mode input impedance 40 50 60 k Ω Gnom Nominal gain VVOUT / (VAINP – VAINN) 4 V/V EG Gain error –0.3% ±0.02% 0.3% Gain error drift –5 ±1 5 ppm/°C Linearity error 12 ppm VDD = 5.5 V, IVOUT = 2.5 mA 48 85 Voltage output swing from negative mV rail (OR pin trip level)(1) VDD = 3.0 V, IVOUT = 2.5 mA 56 100 VDD = 5.5 V, IVOUT = –2.5 mA VDD – 85 VDD – 48 Voltage output swing from positive rail mV (OR pin trip level)(1) VDD = 3.0 V, IVOUT = –2.5 mA VDD – 100 VDD – 56 Signal overrange indication delay VIN = 1-V step 2.5 to 3.5 µs (OR pin)(1) VOUT connected to GND –18 IOS Short-circuit current mA VOUT connected to VDD 20 BW–3dB Bandwidth 2 MHz SR Slew rate 6.5 V/µs Large signal ΔV = ± 2 V to 1%, no external filter 0.9 tsa Settling time µs Small signal ΔV = ± 0.4 V to 0.01% 8 en Output voltage noise density f = 1 kHz, compensation loop disabled 170 nV/ √Hz VREFIN Input voltage range at pin REFIN Input voltage range at REFIN pin GND VDD V (1) See the Magnetic Field Range, Overrange Indicator, and Error Flag section for details on the behavior of the ERROR and OR outputs. (2) Parameter value is referred-to-output (RTO). Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DRV425 |
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