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DFBR030U3LP Datasheet(PDF) 6 Page - Diodes Incorporated |
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DFBR030U3LP Datasheet(HTML) 6 Page - Diodes Incorporated |
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6 / 8 page  SBR is a registered trademark of Diodes Incorporated. DFBR030U3LP Document number: DS35994 Rev. 8 - 2 6 of 8 www.diodes.com June 2015 © Diodes Incorporated DFBR030U3LP 0.01 25 35 45 55 65 75 85 95 105 115 125 T , JUNCTION TEMPERATURE (°C) Figure 11 Output Leakage at 5V Bias vs. Junction Temperature J 0.1 1 10 0.01 25 35 45 55 65 75 85 95 105 115 125 T , TEMPERATURE (°C) Figure 12 Input Leakage at 16V Bias vs. Junction Temperature J JUNCTION 0.1 1 10 0 10 20 30 40 50 60 70 80 3 4 5 6 7 8 9 10 V (V) Figure 13 FET Typical On-Resistance vs. Gate-to-Source Voltage (from 3V to 10V) GS I = 2A D V OUT L1_1 GND1 GND2 L1_2 D1 Q1 D2 Q2 Figure 14 Typical Application Circuit GND1 and GND2 are not internally connected. The user should make the connection in the PCB design. |
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