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UCC27524DSDR Datasheet(PDF) 7 Page - Texas Instruments

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Part # UCC27524DSDR
Description  Industry-Standard Pinout
Download  43 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

UCC27524DSDR Datasheet(HTML) 7 Page - Texas Instruments

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UCC27523, UCC27524, UCC27525, UCC27526
www.ti.com
SLUSAQ3G – NOVEMBER 2011 – REVISED APRIL 2015
7.5 Electrical Characteristics
VDD = 12 V, TA = TJ = –40°C to 140°C, 1-µF capacitor from VDD to GND. Currents are positive into, negative out of the
specified terminal (unless otherwise noted,)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
BIAS CURRENTS
VDD = 3.4 V,
INA = VDD,
55
110
175
Start-up current,
INB = VDD
IDD(off)
(based on UCC27524 Input
μA
VDD = 3.4 V,
configuration)
INA = GND,
25
75
145
INB = GND
UNDERVOLTAGE LOCKOUT (UVLO)
TJ = 25°C
3.91
4.2
4.5
VON
Supply start threshold
TJ = –40°C to 140°C
3.7
4.2
4.65
V
Minimum operating voltage
VOFF
3.4
3.9
4.4
after supply start
VDD_H
Supply voltage hysteresis
0.2
0.3
0.5
INPUTS (INA, INB, INA+, INA–, INB+, INB–), UCC2752X (D, DGN, DSD)
Output high for non-inverting input pins
VIN_H
Input signal high threshold
1.9
2.1
2.3
Output low for inverting input pins
Output low for non-inverting input pins
V
VIN_L
Input signal low threshold
1
1.2
1.4
Output high for inverting input pins
VIN_HYS
Input hysteresis
0.7
0.9
1.1
INPUTS (INA, INB, INA+, INA–, INB+, INB–) UCC27524P ONLY
Output high for non-inverting input pins
VIN_H
Input signal high threshold
2.3
Output low for inverting input pins
Output low for non-inverting input pins
V
VIN_L
Input signal low threshold
1
Output high for inverting input pins
VIN_HYS
Input hysteresis
0.9
ENABLE (ENA, ENB) UCC2752X (D, DGN, DSD)
VEN_H
Enable signal high threshold
Output enabled
1.9
2.1
2.3
VEN_L
Enable signal low threshold
Output disabled
0.95
1.15
1.35
V
VEN_HYS
Enable hysteresis
0.7
0.95
1.1
ENABLE (ENA, ENB) UCC27524P ONLY
VEN_H
Enable signal high threshold
Output enabled
2.3
VEN_L
Enable signal low threshold
Output disabled
0.95
V
VEN_HYS
Enable hysteresis
0.95
OUTPUTS (OUTA, OUTB)
ISNK/SRC
Sink/source peak current(1)
CLOAD = 0.22 µF, FSW = 1 kHz
±5
A
VDD-VOH
High output voltage
IOUT = –10 mA
0.075
V
VOL
Low output voltage
IOUT = 10 mA
0.01
ROH
Output pullup resistance(2)
IOUT = –10 mA
2.5
5
7.5
Ω
ROL
Output pulldown resistance
IOUT = 10 mA
0.15
0.5
1
Ω
(1)
Ensured by design.
(2)
ROH represents on-resistance of only the P-Channel MOSFET device in pullup structure of UCC2752X output stage.
Copyright © 2011–2015, Texas Instruments Incorporated
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Product Folder Links: UCC27523 UCC27524 UCC27525 UCC27526


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