PGA2311

SBOS218B – DECEMBER 2001 – REVISED JANUARY 2016

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7 Detailed Description

7.1 Overview

The PGA2311 is a stereo audio volume control that can be used in a wide array of professional and consumer

audio equipment. The PGA2311 is fabricated in a sub

−micron CMOS process.

The heart of the PGA2311 is a resistor network, an analog switch array, and a high

−performance operational

amplifier stage. The switches select taps in the resistor network that determine the gain of the amplifier stage.

Switch selections are programmed using a serial control port. The serial port allows connection to a wide variety

of host controllers. Functional Block Diagram shows a model diagram of the PGA2311.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Analog Inputs and Outputs

The PGA2311 includes two independent channels (referred to as the left and right channels). Each channel has

a corresponding input and output pin. The input and output pins are unbalanced, or referenced to analog ground

For optimal performance, drive the PGA2311 with a low source impedance. A source impedance of 600

Ω or less

is recommended. Source impedances up to 2 k

Ω cause minimal degradation of THD+N. Refer to Figure 8 for

more details.

7.3.2 Gain Settings

The gain for each channel is set by its corresponding 8

−bit code, either R[7:0] or L[7:0] (see Figure 1). The gain

code data is straight binary format. If N equals the decimal equivalent of R[7:0] or L[7:0], then the following

relationships exist for the gain settings:

•

For N = 0: Mute Condition. The input multiplexer is connected to analog ground (AGNDR or AGNDL).

•

For N = 1 to 255: Gain (dB) = 31.5

− [0.5 w (255 − N)]

10

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