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TAS5760MDCA Datasheet(PDF) 9 Page - Texas Instruments |
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TAS5760MDCA Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 84 page  TAS5760M www.ti.com SLOS772D – JULY 2013 – REVISED JULY 2015 7.7 Serial Audio Port over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DSCLK Allowable SCLK Duty Cycle 45% 50% 55% Required LRCK to SCLK Rising Edge 15 ns Required SDIN Hold Time after SCLK tHLD 15 ns Rising Edge Required SDIN Setup Time before SCLK tsu 15 ns Rising Edge Sample rates above 48kHz supported by "double speed fS Supported Input Sample Rates 32 96 kHz mode," which is activated through the I²C control port fSCLK Supported SCLK Frequencies Values include: 32, 48, 64 32 64 fS 7.8 Protection Circuitry over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OVERTHRES(PVDD) PVDD Overvoltage Error Threshold PVDD Rising 28 V OVEFTHRES(PVDD) PVDD Overvoltage Error Threshold PVDD Falling 27.3 V PVDD Undervoltage Error (UVE) UVEFTHRES(PVDD) PVDD Falling 3.95 V Threshold UVERTHRES(PVDD) PVDD UVE Threshold (PVDD Rising) PVDD Rising 4.15 V Overtemperature Error (OTE) OTETHRES 150 °C Threshold Overtemperature Error (OTE) OTEHYST 15 °C Hysteresis Overcurrent Error (OCE) Threshold for OCETHRES PVDD= 15V, TA = 25 °C 7 A each BTL Output DCETHRES DC Error (DCE) Threshold PVDD= 12V, TA = 25 °C 2.6 V DC Detect Error 650 ms Speaker Amplifier Fault Time Out TSPK_FAULT period OTE or OCP Fault 1.3 s 7.9 Speaker Amplifier in All Modes over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Hardware Control Mode Speaker Amplifier Gain with (Additional gain settings AV00 25.2 dBV SPK_GAIN[1:0] Pins = 00 available in Software Control Mode)(1) Hardware Control Mode Speaker Amplifier Gain with (Additional gain settings AV01 28.6 dBV SPK_GAIN[1:0] Pins = 01 available in Software Control Mode)(1) Hardware Control Mode Speaker Amplifier Gain with (Additional gain settings AV10 31 dBV SPK_GAIN[1:0] Pins = 10 available in Software Control Mode)(1) Speaker Amplifier Gain with (This setting places the device AV11 (Set via I²C) SPK_GAIN[1:0] Pins = 11 in Software Control Mode) BTL, Worst case over voltage, 10 mV gain settings |VOS|(SPK_ Speaker Amplifier DC Offset AMP) PBTL, Worst case over voltage, 15 mV gain settings (1) The digital boost block contributes +6dB of gain to this value. The audio signal must be kept below -6dB to avoid clipping the digital audio path. Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TAS5760M |
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