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TLV320AIC3212IYZFR Datasheet(PDF) 10 Page - Texas Instruments |
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TLV320AIC3212IYZFR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 78 page  TLV320AIC3212 SLAS784A – MARCH 2012 – REVISED SEPTEMBER 2015 www.ti.com Pin Functions (continued) PIN TYPE DESCRIPTION NO. NAME Primary: Audio Serial Data Bus 3 Data Output J7 DOUT3 O Secondary: General Purpose Output Audio Serial Data Bus 1 Word Clock Output Multi Function Digital IO 1 Outputs: General Purpose Output ADC MOD Clock Output CLKOUT Output SAR ADC Interrupt INT1 Output INT2 Output Audio Serial Data Bus 1 Word Clock Output J8 GPIO1 I/O ADC Word Clock Output for Audio Serial Data Bus 1, 2, or 3 (Six-Wire Audio Interface) ADC Bit Clock Output for Audio Serial Data Bus 1, 2, or 3 (Six-Wire Audio Interface) Inputs: General Purpose Input Digital Microphone Data Input Audio Serial Data Bus 1 Word Clock Input General Clock Input Low-Frequency Clock Input ADC Word Clock Input for Audio Serial Data Bus 1, 2, or 3 (Six-Wire Audio Interface) ADC Bit Clock Input for Audio Serial Data Bus 1, 2, or 3 (Six-Wire Audio Interface) J9 DVDD P 1.8V Digital Power Supply 8 Specifications 8.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT AVDD1_18, AVDD2_18, AVDD4_18, AVDD_18 to AVSS1, AVSS2, AVSS4, –0.3 2.2 V AVSS respectively(2) AVDD3_33 to AVSS3 and RECVDD_33 to RECVSS –0.3 3.9 V DVDD to DVSS –0.3 2.2 V IOVDD to IOVSS –0.3 3.9 V HVDD_18 to AVSS –0.3 2.2 V CPVDD_18 to CPVSS –0.3 2.2 V SLVDD to SLVSS, SRVDD to SRVSS, SPK_V to SRVSS(3) –0.3 6 V Digital input voltage to ground IOVSS – 0.3 IOVDD + 0.3 V Analog input voltage to ground AVSS – 0.3 AVDDx_18 + 0.3 V VBAT –0.3 6 V Operating temperature –40 85 °C Junction temperature (TJ Max) 105 °C Storage temperature –55 125 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) TI recommends to keep all AVDDx_18 supplies within ± 50 mV of each other. (3) TI recommends to keep SLVDD, SRVDD, and SPK_V supplies within ± 50 mV of each other. 10 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TLV320AIC3212 |
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