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C8051F850-C-GU Datasheet(PDF) 7 Page - Silicon Laboratories |
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C8051F850-C-GU Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 328 page Rev. 1.0 6 24.1.Supporting Documents223 24.2.SMBus Configuration223 24.3.SMBus Operation223 24.3.1.Transmitter vs. Receiver224 24.3.2.Arbitration224 24.3.3.Clock Low Extension224 24.3.4.SCL Low Timeout224 24.3.5.SCL High (SMBus Free) Timeout225 24.4.Using the SMBus225 24.4.1.SMBus Configuration Register225 24.4.2.SMBus Pin Swap227 24.4.3.SMBus Timing Control227 24.4.4.SMB0CN Control Register227 24.4.5.Hardware Slave Address Recognition229 24.4.6.Data Register229 24.5.SMBus Transfer Modes230 24.5.1.Write Sequence (Master)230 24.5.2.Read Sequence (Master)231 24.5.3.Write Sequence (Slave)232 24.5.4.Read Sequence (Slave)233 24.6.SMBus Status Decoding233 24.7.I2C / SMBus Control Registers238 25. Timers (Timer0, Timer1, Timer2 and Timer3)245 25.1.Timer 0 and Timer 1246 25.1.1.Mode 0: 13-bit Counter/Timer247 25.1.2.Mode 1: 16-bit Counter/Timer247 25.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload248 25.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)249 25.2.Timer 2 and Timer 3250 25.2.1.16-bit Timer with Auto-Reload250 25.2.2.8-bit Timers with Auto-Reload251 25.2.3.Capture Mode252 25.3.Timer Control Registers253 26. Universal Asynchronous Receiver/Transmitter (UART0)271 26.1.Enhanced Baud Rate Generation271 26.2.Operational Modes273 26.2.1.8-Bit UART273 26.2.2.9-Bit UART274 26.3.Multiprocessor Communications275 26.4.UART Control Registers277 27. Watchdog Timer (WDT0)280 27.1.Enabling / Resetting the WDT281 27.2.Disabling the WDT281 27.3.Disabling the WDT Lockout281 27.4.Setting the WDT Interval281 |
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