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C8051F921-G-GM Datasheet(PDF) 4 Page - Silicon Laboratories |
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C8051F921-G-GM Datasheet(HTML) 4 Page - Silicon Laboratories |
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4 / 351 page  C8051F93x-C8051F92x 4 Rev. 1.4 7.2. Comparator Outputs ......................................................................................... 94 7.3. Comparator Response Time............................................................................. 95 7.4. Comparator Hysterisis ...................................................................................... 95 7.5. Comparator Register Descriptions.................................................................... 96 7.6. Comparator0 and Comparator1 Analog Multiplexers...................................... 100 8. CIP-51 Microcontroller ......................................................................................... 103 8.1. Instruction Set ................................................................................................. 104 8.1.1. Instruction and CPU Timing ................................................................... 104 8.2. CIP-51 Register Descriptions.......................................................................... 109 9. Memory Organization........................................................................................... 112 9.1. Program Memory ............................................................................................ 113 9.1.1. MOVX Instruction and Program Memory ............................................... 113 9.2. Data Memory .................................................................................................. 114 9.2.1. Internal RAM .......................................................................................... 114 9.2.2. External RAM ......................................................................................... 115 10. External Data Memory Interface and On-Chip XRAM........................................ 116 10.1.Accessing XRAM............................................................................................ 116 10.1.1.16-Bit MOVX Example ........................................................................... 116 10.1.2.8-Bit MOVX Example ............................................................................. 116 10.2.Configuring the External Memory Interface for Off-Chip Access.................... 117 10.3.External Memory Interface Port Input/Output Configuration........................... 117 10.4.Multiplexed External Memory Interface .......................................................... 118 10.5.External Memory Interface Operating Modes................................................. 120 10.5.1.Internal XRAM Only ............................................................................... 120 10.5.2.Split Mode without Bank Select.............................................................. 120 10.5.3.Split Mode with Bank Select................................................................... 121 10.5.4.External Only.......................................................................................... 121 10.6.External Memory Interface Timing.................................................................. 121 10.7.EMIF Special Function Registers ................................................................... 122 10.8.EMIF Timing Diagrams................................................................................... 125 10.8.1.Multiplexed 16-bit MOVX: EMI0CF[3:2] = 01, 10, or 11 ......................... 125 10.8.2.Multiplexed 8-bit MOVX without Bank Select: EMI0CF[3:2] = 01 or 11. 126 11. Special Function Registers ................................................................................. 129 11.1.SFR Paging .................................................................................................... 130 12. Interrupt Handler .................................................................................................. 136 12.1.Enabling Interrupt Sources ............................................................................. 136 12.2.MCU Interrupt Sources and Vectors............................................................... 136 12.3.Interrupt Priorities ........................................................................................... 137 12.4.Interrupt Latency............................................................................................. 137 12.5.Interrupt Register Descriptions ....................................................................... 139 12.6.External Interrupts INT0 and INT1.................................................................. 146 13. Flash Memory ....................................................................................................... 148 13.1.Programming The Flash Memory ................................................................... 148 13.1.1.Flash Lock and Key Functions ............................................................... 148 13.1.2.Flash Erase Procedure .......................................................................... 149 |
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