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C8051F987-C-GM Datasheet(PDF) 3 Page - Silicon Laboratories |
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C8051F987-C-GM Datasheet(HTML) 3 Page - Silicon Laboratories |
3 / 325 page Rev. 1.2 3 C8051F99x-C8051F98x 6.2. IREF0 Specifications......................................................................................... 92 7. Comparator ............................................................................................................. 93 7.1. Comparator Inputs ............................................................................................ 93 7.2. Comparator Outputs ......................................................................................... 94 7.3. Comparator Response Time............................................................................. 94 7.4. Comparator Hysteresis ..................................................................................... 94 7.5. Comparator Register Descriptions.................................................................... 95 7.6. Comparator0 Analog Multiplexer ...................................................................... 98 8. Capacitive Sense (CS0)........................................................................................ 100 8.1. Configuring Port Pins as Capacitive Sense Inputs ......................................... 101 8.2. Initializing the Capacitive Sensing Peripheral ................................................. 101 8.3. Capacitive Sense Start-Of-Conversion Sources............................................. 101 8.4. CS0 Multiple Channel Enable ......................................................................... 102 8.5. CS0 Gain Adjustment ..................................................................................... 102 8.6. Wake from Suspend ....................................................................................... 102 8.7. Using CS0 in Applications that Utilize Sleep Mode......................................... 102 8.8. Automatic Scanning (Method 1—CS0SMEN = 0) .......................................... 103 8.9. Automatic Scanning (Method 2—CS0SMEN = 1) .......................................... 104 8.10.CS0 Comparator............................................................................................. 104 8.11.CS0 Conversion Accumulator ........................................................................ 105 8.12.CS0 Pin Monitor ............................................................................................. 106 8.13.Adjusting CS0 For Special Situations............................................................. 106 8.14.Capacitive Sense Multiplexer ......................................................................... 117 9. CIP-51 Microcontroller ......................................................................................... 119 9.1. Performance ................................................................................................... 119 9.2. Programming and Debugging Support ........................................................... 120 9.3. Instruction Set ................................................................................................. 120 9.3.1. Instruction and CPU Timing ................................................................... 120 9.4. CIP-51 Register Descriptions.......................................................................... 125 10. Memory Organization........................................................................................... 128 10.1.Program Memory............................................................................................ 129 10.1.1.MOVX Instruction and Program Memory ............................................... 129 10.2.Data Memory .................................................................................................. 129 10.2.1.Internal RAM .......................................................................................... 129 10.2.2.External RAM ......................................................................................... 130 11. On-Chip XRAM...................................................................................................... 131 11.1.Accessing XRAM............................................................................................ 131 11.1.1.16-Bit MOVX Example ........................................................................... 131 11.1.2.8-Bit MOVX Example ............................................................................. 131 12. Special Function Registers ................................................................................. 132 12.1.SFR Paging .................................................................................................... 133 13. Interrupt Handler .................................................................................................. 138 13.1.Enabling Interrupt Sources ............................................................................. 138 13.2.MCU Interrupt Sources and Vectors............................................................... 138 13.3.Interrupt Priorities ........................................................................................... 139 |
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