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EFM32G842F32-QFP64 Datasheet(PDF) 6 Page - Silicon Laboratories |
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EFM32G842F32-QFP64 Datasheet(HTML) 6 Page - Silicon Laboratories |
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6 / 70 page  ...the world's most energy friendly microcontrollers 2015-05-22 - EFM32G842FXX - d0070_Rev1.90 6 www.silabs.com 2.1.19 Voltage Comparator (VCMP) The Voltage Supply Comparator is used to monitor the supply voltage from software. An interrupt can be generated when the supply falls below or rises above a programmable threshold. Response time and thereby also the current consumption can be configured by altering the current supply to the comparator. 2.1.20 Analog to Digital Converter (ADC) The ADC is a Successive Approximation Register (SAR) architecture, with a resolution of up to 12 bits at up to one million samples per second. The integrated input mux can select inputs from 8 external pins and 6 internal signals. 2.1.21 Digital to Analog Converter (DAC) The Digital to Analog Converter (DAC) can convert a digital value to an analog output voltage. The DAC is fully differential rail-to-rail, with 12-bit resolution. It has two single ended output buffers which can be combined into one differential output. The DAC may be used for a number of different applications such as sensor interfaces or sound output. 2.1.22 Advanced Encryption Standard Accelerator (AES) The AES accelerator performs AES encryption and decryption with 128-bit or 256-bit keys. Encrypting or decrypting one 128-bit data block takes 52 HFCORECLK cycles with 128-bit keys and 75 HFCORECLK cycles with 256-bit keys. The AES module is an AHB slave which enables efficient access to the data and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit operations are not supported. 2.1.23 General Purpose Input/Output (GPIO) In the EFM32G842, there are 53 General Purpose Input/Output (GPIO) pins, which are divided into ports with up to 16 pins each. These pins can individually be configured as either an output or input. More advanced configurations like open-drain, filtering and drive strength can also be configured individually for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM outputs or USART communication, which can be routed to several locations on the device. The GPIO supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other peripherals. 2.1.24 Liquid Crystal Display Driver (LCD) The LCD driver is capable of driving a segmented LCD display with up to 4x22 segments. A voltage boost function enables it to provide the LCD display with higher voltage than the supply voltage for the device. In addition, an animation feature can run custom animations on the LCD display without any CPU intervention. The LCD driver can also remain active even in Energy Mode 2 and provides a Frame Counter interrupt that can wake-up the device on a regular basis for updating data. 2.2 Configuration Summary The features of the EFM32G842 is a subset of the feature set described in the EFM32G Reference Manual. Table 2.1 (p. 6) describes device specific implementation of the features. Table 2.1. Configuration Summary Module Configuration Pin Connections Cortex-M3 Full configuration NA |
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