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EFM32HG110 Datasheet(PDF) 3 Page - Silicon Laboratories

Part # EFM32HG110
Description  Output state retention and wake-up from Shutoff Mode
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EFM32HG110 Datasheet(HTML) 3 Page - Silicon Laboratories

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Preliminary
...the world's most energy friendly microcontrollers
2015-05-06 - EFM32HG110FXX - _Rev0.91
3
www.silabs.com
2 System Summary
2.1 System Introduction
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination
of the powerful 32-bit ARM Cortex-M0+, innovative low energy techniques, short wake-up time from
energy saving modes, and a wide selection of peripherals, the EFM32HG microcontroller is well suited
for any battery operated application as well as other systems requiring high performance and low-energy
consumption. This section gives a short introduction to each of the modules in general terms and also
shows a summary of the configuration for the EFM32HG110 devices. For a complete feature set and
in-depth information on the modules, the reader is referred to the EFM32HG Reference Manual.
A block diagram of the EFM32HG110 is shown in Figure 2.1 (p. 3) .
Figure 2.1. Block Diagram
Clock Managem ent
Energy Managem ent
Serial Int erfaces
I/ O Port s
Core and Mem ory
Tim ers and Triggers
3 2 - bit bus
Per ipher al Ref lex Syst em
ARM Cort ex ™ M0+ processor
Flash
Program
Mem ory
Pulse
Count er
Wat chdog
Tim er
RAM
Mem ory
General
Purpose
I/ O
Ex t ernal
Int errupt s
Pin
Reset
HG110F64/ F32
USART
I
2
C
Power- on
Reset
Volt age
Regulat or
Volt age
Com parat or
Brown- out
Det ect or
Tim er/
Count er
Real Tim e
Count er
Current
DAC
Low
Energy
UART™
Pin
Wakeup
Analog Int erfaces
ADC
Securit y
Hardware
AES
DMA
Cont roller
High Freq
Cryst al
Oscillat or
Low Freq
Cryst al
Oscillat or
Low Freq
RC
Oscillat or
Ult ra Low Freq
RC
Oscillat or
High Freq
RC
Oscillat or
48/ 24 MHz
Com m . RC
Oscillat or
Aux High
Freq RC
Oscillat or
Analog
Com parat or
2.1.1 ARM Cortex-M0+ Core
The ARM Cortex-M0+ includes a 32-bit RISC processor which can achieve as much as 0.9 Dhrystone
MIPS/MHz. A Wake-up Interrupt Controller handling interrupts triggered while the CPU is asleep is in-
cluded as well. The EFM32 implementation of the Cortex-M0+ is described in detail in ARM Cortex-M0+
Devices Generic User Guide.
2.1.2 Debug Interface (DBG)
This device includes hardware debug support through a 2-pin serial-wire debug interface and a Micro
Trace Buffer (MTB) for data/instruction tracing.
2.1.3 Memory System Controller (MSC)
The Memory System Controller (MSC) is the program memory unit of the EFM32HG microcontroller.
The flash memory is readable and writable from both the Cortex-M0+ and DMA. The flash memory is
divided into two blocks; the main block and the information block. Program code is normally written to
the main block. Additionally, the information block is available for special user data and flash lock bits.


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