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SN65LVDS104 Datasheet(PDF) 4 Page - Texas Instruments |
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SN65LVDS104 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 33 page SN65LVDS104, SN65LVDS105 SLLS396G – SEPTEMBER 1999 – REVISED DECEMBER 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Supply voltage, VCC (2) –0.5 4 V Enables, A (SN65LVDS105) –0.5 6 V Voltage A, B, Y or Z –0.5 4 V Continuous power dissipation See Dissipation Ratings Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds 260 °C Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. 7.2 ESD Ratings—JEDEC VALUE UNIT Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±12000 Electrostatic V(ESD) V discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 ESD Ratings—MIL-STD VALUE UNIT Class 3, A 16000 Tested in accordance with MIL-STD-883C Method V(ESD) Electrostatic discharge V 3015.7; A, B, Y, Z, and GND pins Class 3, B 400 7.4 Recommended Operating Conditions MIN NOM MAX UNIT VCC Supply voltage 3 3.3 3.6 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI or VIC Voltage at any bus terminal (separately or common-mode) 0 VCC–0.8 TA Operating free-air temperature –40 85 °C 7.5 Thermal Information SN65LVDS104, SN65LVDS105 THERMAL METRIC(1) D (SOIC) PW (TSSOP) UNIT 16 PINS 16 PINS RθJA Junction-to-ambient thermal resistance 74.4 101.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 35.1 29.2 °C/W RθJB Junction-to-board thermal resistance 32 47.3 °C/W ψJT Junction-to-top characterization parameter 6 1.4 °C/W ψJB Junction-to-board characterization parameter 31.7 46.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 4 Submit Documentation Feedback Copyright © 1999–2015, Texas Instruments Incorporated Product Folder Links: SN65LVDS104 SN65LVDS105 |
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