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EVB-LAN9252 Datasheet(PDF) 11 Page - Microchip Technology |
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EVB-LAN9252 Datasheet(HTML) 11 Page - Microchip Technology |
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11 / 55 page  EVB-LAN9252-HBI-SPI-SQI-GPIO ETHERCAT® HBI/SPI+GPIO USER’S GUIDE 2015 Microchip Technology Inc. DS50002333A-page 11 Chapter 1. Overview 1.1 INTRODUCTION The LAN9252 is a 2-port EtherCAT® Slave Controller (ESC) with dual integrated Ether- net PHYs which each contain a full-duplex 100BASE-TX transceiver and support 100Mbps (100BASE-TX) operation. 100BASE-FX is supported via an external fiber transceiver. Each port receives an EtherCAT® frame, performs frame checking and forwards it to the next port. Time stamps of received frames are generated when they are received. The Loop-back function of each port forwards the frames to the next logical port if there is either no link at a port, if the port is not available, or if the loop is closed for that port. The Loop-back function of port 0 forwards the frames to the EtherCAT® Processing Unit. The loop settings can be controlled by the EtherCAT® master. Packets are forwarded in the following order: Port 0 -> EtherCAT® Processing Unit -> Port 1 -> Port 2. The EtherCAT® Processing Unit (EPU) receives, analyzes and processes the Ether- CAT® data stream. The main purpose of the EtherCAT® Processing unit is to enable and coordinate access to the internal registers and the memory space of the ESC, which can be addressed both from the EtherCAT® master and from the local applica- tion. Data exchange between master and slave applications is comparable to a dual-ported memory (process memory), enhanced by special functions for consistency checking (SyncManager) and data mapping (FMMU). Each FMMU performs bitwise mapping of logical EtherCAT® system addresses to physical device addresses. The scope of this document is to describe the EVB-LAN9252-HBI-SPI-SQI-GPIO setup, which supports a HBI/SPI+GPIO Interface and corresponding jumper configura- tions. The LAN9252 is connected to an RJ45 Ethernet jack with integrated magnetics for 100BASE-TX connectivity. A simplified block diagram of the EVB-LAN9252-HBI-SPI-SQI-GPIO is shown in Figure 1-1. |
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