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LM555 Datasheet(PDF) 9 Page - Texas Instruments

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Part # LM555
Description  Timer
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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LM555 Datasheet(HTML) 9 Page - Texas Instruments

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LM555
www.ti.com
SNAS548D – FEBRUARY 2000 – REVISED JANUARY 2015
Feature Description (continued)
capacitor equals 2/3 of the supply voltage. The output pulse width can be extended or shortened depending
on the application by adjusting the R and C values.
Astable (free-running) mode: The LM555 timer can operate as an oscillator and puts out a continuous stream
of rectangular pulses having a specified frequency. The frequency of the pulse stream depends on the values
of RA, RB, and C.
7.4 Device Functional Modes
7.4.1 Monostable Operation
In this mode of operation, the timer functions as a one-shot (Figure 11). The external capacitor is initially held
discharged by a transistor inside the timer. Upon application of a negative trigger pulse of less than 1/3 VCC to
pin 2, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high.
Figure 11. Monostable
The voltage across the capacitor then increases exponentially for a period of t = 1.1 RA C, at the end of which
time the voltage equals 2/3 VCC. The comparator then resets the flip-flop which in turn discharges the capacitor
and drives the output to its low state. Figure 12 shows the waveforms generated in this mode of operation. Since
the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing
interval is independent of supply.
VCC = 5 V
Top Trace: Input 5V/Div.
TIME = 0.1 ms/DIV.
Middle Trace: Output 5V/Div.
RA = 9.1 kΩ
Bottom Trace: Capacitor Voltage 2V/Div.
C = 0.01
μF
Figure 12. Monostable Waveforms
During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit
so long as the trigger input is returned high at least 10
μs before the end of the timing interval. However the
circuit can be reset during this time by the application of a negative pulse to the reset terminal (pin 4). The output
will then remain in the low state until a trigger pulse is again applied.
When the reset function is not in use, TI recommends connecting the Reset pin to VCC to avoid any possibility of
false triggering.
Copyright © 2000–2015, Texas Instruments Incorporated
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