LMK00105

SNAS579G – MARCH 2012 – REVISED DECEMBER 2014

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Table of Contents

1

Features .................................................................. 1

8

Application and Implementation ........................ 12

8.1

Application Information............................................ 12

2

Applications ........................................................... 1

8.2

Typical Applications ................................................ 14

3

Description ............................................................. 1

9

Power Supply Recommendations ...................... 20

4

Revision History..................................................... 2

9.1

Power Supply Filtering ............................................ 20

5

Pin Configuration and Diagrams.......................... 4

9.2

Power Supply Ripple Rejection............................... 20

6

Specifications......................................................... 5

9.3

Power Supply Bypassing ........................................ 21

6.1

Absolute Maximum Ratings ...................................... 5

10

Layout................................................................... 21

6.2

ESD Ratings.............................................................. 5

10.1

Layout Guidelines ................................................. 21

6.3

Recommended Operating Conditions ....................... 5

10.2

Layout Example .................................................... 22

6.4

Thermal Information .................................................. 5

10.3

Thermal Management ........................................... 22

6.5

Electrical Characteristics........................................... 6

11

Device and Documentation Support ................. 23

6.6

Typical Characteristics .............................................. 8

11.1

Documentation Support ........................................ 23

7

Detailed Description .............................................. 9

11.2

Trademarks ........................................................... 23

7.1

Overview ................................................................... 9

11.3

Electrostatic Discharge Caution ............................ 24

7.2

Functional Block Diagram ......................................... 9

11.4

Glossary ................................................................ 24

7.3

Feature Description................................................... 9

12

Mechanical, Packaging, and Orderable

7.4

Device Functional Modes........................................ 11

Information ........................................................... 24

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (May 2013) to Revision G

Page

•

Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional

Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Changes from Revision E (February 2013) to Revision F

Page

•

Added device name to title of document. ............................................................................................................................... 1

•

Changed all LLP and QFN packages to WQFN throughout document.................................................................................. 1

•

Deleted optional from CLKin* pin description. And changed complimentary to complementary. .......................................... 4

•

Added max limit to Output Skew parameter and added tablenote to parameter in Electrical Characteristics Table............. 6

•

Changed typical value for both conditions of Propagation Delay in the Electrical Characteristics Table. ............................. 6

•

Added Min/Max limits to both conditions of Propagation Delay parameter in Electrical Characteristics Table. .................... 6

•

Changed unit value for the first condition of Part-to-part Skew from ps to ns in the Electrical Characteristics Table. .......... 6

•

Changed both Max values of each Part-to-part Skew condition in Electrical Characteristics Table...................................... 6

•

Changed the Typ value of each Rise/Fall Time condition in the Electrical Characteristics Table. ....................................... 6

•

•

•

Added CLKin* column to CLKin Input vs. Output States table. Also added fourth row starting with Logic Low under

CLKin column. ...................................................................................................................................................................... 10

•

Changed table title from CLKin input vs. Output States to OSCin Input vs. Output States ................................................. 10

•

Changed third paragraph in Driving the Clock Inputs section to include CLKin* and LVCMOS text. Removed extra

references to other figures. Revised to better correspond with information in Electrical Characteristics Table. ................. 12

•

Deleted Figure 10 (Near End termination) and Figure 11 (Far End termination) from Driving the Clock Inputs section..... 12

•

Changed bypass cap text to signal attenuation text of the fourth paragraph in Driving the Clock Inputs section. .............. 12

•

Changed Single-Ended LVCMOS Input, DC Coupling with Common Mode Biasing image with revised graphic............... 13

•

Deleted sentence in reference to two deleted images. ........................................................................................................ 13

2

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