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AN644 Datasheet(PDF) 10 Page - Silicon Laboratories |
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AN644 Datasheet(HTML) 10 Page - Silicon Laboratories |
10 / 15 page AN644 10 Rev. 0.3 1.6. Thermal Performance for Two-Layer Module Applications When designing a small, two-layer based on the Si477x, the module size must be no less than 3 x 5 cm to achieve best thermal performance, as a larger board area dissipates heat more readily. Place all LDOs on the base board if possible, to eliminate heat sources on the module. Lowering VA from 5.0 V to 4.8 V decreases board temperature without RF performance degradation. Connect the IC ground paddle to the bottom layer PCB ground using vias to dissipate heat. Place large vias on the ground paddle connected to the bottom layer ground as shown in Figure 9. Do not use vias with diameter greater than 20 mils, as this may impact RF performance. Standard 1 mil via plating lowers thermal resistance and helps decrease temperature. Figure 9. Si477x Ground Paddle Via Placement Connect NC pins, I2C address select pins A0/A1, and the IC ground paddle to the top layer ground with solid ground fill to lower thermal resistance. For two-layer module designs, 2 oz Cu weight (70 µm) is required to maximize thermal performance. FR4-370HR PCB material is recommended for best thermal and RF performance due to its thermal conductivity. |
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