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SI4730-D50 Datasheet(PDF) 8 Page - Silicon Laboratories |
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SI4730-D50 Datasheet(HTML) 8 Page - Silicon Laboratories |
8 / 34 page Si4730/31-D50 8 Rev. 1.0 Figure 2. 2-Wire Control Interface Read and Write Timing Parameters Figure 3. 2-Wire Control Interface Read and Write Timing Diagram SCLK 70% 30% SDIO 70% 30% START START STOP tf:IN tr:IN tLOW tHIGH tHD:STA tSU:STA tSU:STO tSP tBUF tSU:DAT tr:IN tHD:DAT tf:IN, tf:OUT SCLK SDIO START STOP ADDRESS + R/W ACK DATA ACK DATA ACK A6-A0, R/W D7-D0 D7-D0 |
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