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ADS42B49IRGCT Datasheet(PDF) 7 Page - Texas Instruments |
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ADS42B49IRGCT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 65 page 48 47 46 45 42 43 42 41 40 39 38 37 36 35 34 33 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DRVDD DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 DRGND DRVDD CTRL3 CTRL2 CTRL1 AVDD_BUF AVDD DRVDD DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 RESET SCLK SDATA SEN AVDD Thermal Pad (Connected to DRGND) ADS42B49 www.ti.com SBAS558C – DECEMBER 2012 – REVISED DECEMBER 2015 RGC Package(2) 64-Pin VQFN With Exposed Thermal Pad CMOS Mode - Top View (1) The thermal pad is connected to DRGND. Pin Functions - CMOS Mode PIN I/O DESCRIPTION NAME NO. 17, 18, 21, 24, 27, 28, AGND Input Analog ground 31, 32 AVDD 16, 22, 33 Input Analog power supply AVDD_BUF 34 Input Analog buffer supply CLKM 26 Input Differential clock negative input CLKP 25 Input Differential clock positive input CLKOUT 57 Output CMOS output clock CTRL1 35 Input Digital control input pins. Together, these pins control various power-down modes. CTRL2 36 Input Digital control input pins. Together, these pins control various power-down modes. CTRL3 37 Input Digital control input pins. Together, these pins control various power-down modes. 40, 41, 42, 43, 44, 45, DA0 to DA13 46, 47, 50, 51, 52, 53, Output Channel A ADC output data bits, CMOS levels 54 ,55 60, 61, 62, 63, 2, 3, 4, DB0 to DB13 Output Channel B ADC output data bits, CMOS levels 5, 6, 7, 8, 9, 10, 11 DRGND 39, 49, 59, PAD Input Output buffer ground, should be shorted on-board to analog ground. DRVDD 1, 38, 48, 58 Input Output buffer supply INM_A 30 Input Differential analog negative input, channel A INP_A 29 Input Differential analog positive input, channel A INM_B 20 Input Differential analog negative input, channel B Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: ADS42B49 |
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