ADS1000-Q1

Clock

Oscillator

I C

2

Interface

A/D

Converter

PGA

A = 1, 2, 4, or 8

V

DD

V

IN+

V

IN-

GND

SDA

SCL

ADS1000-Q1

SBAS480B – SEPTEMBER 2009 – REVISED OCTOBER 2015

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7 Detailed Description

7.1 Overview

The ADS1000-Q1 is a fully differential, 12-bit A/D converter. The ADS1000-Q1 allows users to obtain precise

measurements with a minimum of effort, and the device is easy to design with and configure.

Each of these blocks are described in detail in the following sections.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Analog-to-Digital Converter

The ADS1000-Q1 uses a switched-capacitor input stage. To external circuitry, it looks roughly like a resistance.

The resistance value depends on the capacitor values and the rate at which they are switched. The switching

clock is generated by the onboard clock generator, so its frequency, nominally 275 kHz, is dependent on supply

voltage and temperature. The capacitor values depend on the PGA setting.

The common-mode and differential input impedances are different. For a gain setting of PGA, the differential

input impedance is typically 2.4 M

Ω/PGA. The common-mode impedance is typically 8 MΩ.

7.3.2 Clock Generator

The ADS1000-Q1 features an onboard clock generator. The Typical Characteristics show variations in data rate

over supply voltage and temperature. It is not possible to operate the ADS1000-Q1 with an external clock.

7.4 Device Functional Modes

7.4.1 Operating Modes

The ADS1000-Q1 operates in one of two modes: continuous conversion and single conversion.

In continuous conversion mode, the ADS1000-Q1 continuously performs conversions. Once a conversion has

been completed, the ADS1000-Q1 places the result in the output register, and immediately begins another

conversion. When the ADS1000-Q1 is in continuous conversion mode, the ST/BSY bit in the configuration

register always reads 1.

In single conversion mode, the ADS1000-Q1 waits until the ST/BSY bit in the conversion register is set to 1.

When this happens, the ADS1000-Q1 powers up and performs a single conversion. After the conversion

completes, the ADS1000-Q1 places the result in the output register, resets the ST/BSY bit to 0 and powers

down. Writing a 1 to ST/BSY while a conversion is in progress has no effect.

When switching from continuous conversion mode to single conversion mode, the ADS1000-Q1 will complete the

current conversion, reset the ST/BSY bit to 0 and power down the device.

8

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