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TPL0202 Datasheet(PDF) 6 Page - Texas Instruments |
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TPL0202 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 35 page  TPL0202 SLIS135D – DECEMBER 2010 – REVISED OCTOBER 2015 www.ti.com Electrical Characteristics (continued) VDD = 2.7 to 5.5 V, TA= –40°C to 105°C (unless otherwise noted). Typical values are at VDD= 5 V, TA= 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fH_A = 1 kHz, XTALK Crosstalk VL_A = VL_B = VDD / 2, VH_B = Floating -94 dB Measurement at W_A and W_B RHEOSTAT MODE (Measurements between W and L with H not connected, or between W and H with L not connected) RINL (10) (11) Integral non-linearity –1.5 1.5 LSB RDNL(10) (12) Differential non-linearity –0.5 0.5 LSB ROFFSET (13) Offset 0 2.5 7 LSB (14) RMATCH (13) (15) Channel-to-channel matching –2 2 LSB (10) RLSB = (RMEAS[code 255] – RMEAS[code 0]) / 255 (11) RINL =((RMEAS[code x] – RMEAS[code 0]) / RLSB) - [code x] (12) RDNL = ((RMEAS[code x] – RMEAS[code x-1]) / RLSB ) – 1 (13) IDEAL_RLSB = RTOT / 256 (14) ROFFSET = RMEAS[code 0] / IDEAL_RLSB (15) RMATCH = (RMEAS_A[code x] – RMEAS_B[code x]) / IDEAL_RLSB 6.6 Operating Characteristics VDD = 2.7 V to 5.5 V, VH= VDD, VL= GND, TA= –40°C to 105°C (unless otherwise noted). Typical values are at VDD= 5 V, TA= 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IDD(STBY) VDD supply current during standby Digital inputs = VDD or GND 1 5 µA VDD supply current during write cycle IDD Digital inputs = VDD or GND 400 µA only Digital pins leakage current (SCLK, IIN-DIG –1 1 µA DIN, CS inputs) Minimum VDD at which memory VPOR Power-on recall voltage 2 V recall occurs EEPROM SPECIFICATION TA = 105°C 1000 EEPROM read endurance cycles TA = 25°C 10000 TA = 105°C 20 EEPROM retention years TA = 85°C 100 tBUSY Write NV register busy time 20 ms Time from CS rising edge to wiper tACC Read NV register access time start to 10% of expected change 40 ns with read NVM command Power-up response time (VDD above Time from VPOR to wiper output tD VPOR to wiper register value recall 35 100 µs settled completed) SERIAL INTERFACE SPECIFICATIONS (SCLK, DIN, CS INPUTS) VDD = 3.6 to 5.5 V 2.4 5.5 VIH Input high voltage V VDD = 2.7 to 3.6 V 0.7 × VDD 5.5 VIL Input low voltage SCLK, DIN, CS inputs 0 0.8 V CIN Pin capacitance SCLK, DIN, CS inputs 7 pF 6 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPL0202 |
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