ADS7924_15 datasheet(6/50 Pages) TI1

Part #	ADS7924

Description	4-Channel, MicroPOWER Analog-to-Digital Converter

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Manufacturer	TI1 [Texas Instruments]

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SCL

SDA

t

R

t

HDSTA

t

HDSTA

t

HDDAT

t

BUF

t

HIGH

t

SUSTA

t

SUSTO

P

S

Sr

P

t

SP

t

VDACK

t

SUDAT

9thClock

t

VDDAT

t

F

t

LOW

ADS7924

SBAS482B – JANUARY 2010 – REVISED SEPTEMBER 2015

www.ti.com

6.6 I

2C Timing Requirements

MIN

MAX

UNIT

fSCL

SCL operating frequency

0

0.4

MHz

tBUF

Bus free time between START and STOP condition

1.3

μs

Hold time after repeated START condition.

tHDSTA

600

ns

After this period, the first clock is generated.

tSUSTA

Repeated START condition setup time

600

ns

tSUSTO

Stop condition setup time

600

ns

tHDDAT

Data hold time

0

ns

tSUDAT

Data setup time

100

ns

tLOW

SCL clock low period

1300

ns

tHIGH

SCL clock high period

600

ns

tF

Clock/data fall time

300

ns

tR

Clock/data rise time

300

ns

tVDDAT

Data valid time

0.9

μs

tVDACK

Data valid acknowledge time

0.9

μs

tSP

Pulse width of spike that must be suppressed by the input filter

0

50

ns

NOTE: S = Start, Sr = Repeated Start, and P = Stop.

Figure 1. I2C Timing Diagram

6

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