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L9779WD-TR Datasheet(PDF) 7 Page - STMicroelectronics

Part # L9779WD-TR
Description  Multifunction IC for engine management system
Download  170 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9779WD-TR Datasheet(HTML) 7 Page - STMicroelectronics

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L9779WD
List of figures
8
List of figures
Figure 1.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 2.
Pins connection diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 3.
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 4.
Configuration supplied by VB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 5.
Power-up/down management unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 6.
Non-permanent supply power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 7.
Permanent supply power-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8.
Power-down sequence without power latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 9.
Power-down sequence without power latch mode and PSOFF = 1 . . . . . . . . . . . . . . . . . . 27
Figure 10.
Power-down sequence with power latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 11.
Power-down sequence with power latch mode and KEY_ON toggle . . . . . . . . . . . . . . . . . 29
Figure 12.
KEY_ON voltage vs. status diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 13.
Smart reset circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 14.
RST pin as a function of VDD5 (if CONFIG_REG6 bit3 = Low) . . . . . . . . . . . . . . . . . . . . . 36
Figure 15.
Structure regulators diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Figure 16.
Graphic representation of the calculation method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 17.
Circuit and PCB layout suggested . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 18.
VB overvoltage diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 19.
VDD5 overvoltage diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 20.
VDD5 vs battery: ramp-up diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 21.
VDD5 vs battery (ramp-down diagram) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 22.
Main relay driver controlled by L9779WD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 23.
Scenario 1a: Standard on/off MRD driver with NO power latch mode bit PSOFF = 0 . . . . 50
Figure 24.
Scenario 1b: Standard on/off MRD driver with NO power latch mode bit PSOFF = 1 . . . . 51
Figure 25.
Scenario 2: Standard on/off MRD driver with power latch mode bit PSOFF = 0 . . . . . . . . 51
Figure 26.
Scenario 3a: Deglitch concept on KEY_ON at start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 27.
Scenario 3b: Deglitch concept on KEY_ON during ON phase . . . . . . . . . . . . . . . . . . . . . . 52
Figure 28.
Scenario 4: Non standard on, KEY_ON removed before VB present . . . . . . . . . . . . . . . . 52
Figure 29.
Scenario 5: MRD overcurrent without VB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 30.
Scenario 6: permanent MRD overcurrent with VBPOR restart . . . . . . . . . . . . . . . . . . . . . . 53
Figure 31.
Scenario 7 (temporary MRD overcurrent with VB POR restart) . . . . . . . . . . . . . . . . . . . . . 53
Figure 32.
Scenario 8 (temporary MRD overcurrent with VB µC commands restart) . . . . . . . . . . . . . 54
Figure 33.
LSa function OUT 1 to 5 (Injectors) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 34.
LSb function OUT6, 7 (O2 heater) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 35.
LSc function OUT19, 20 (low current drivers). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 36.
LSd function OUT13 to 18 (relay drivers) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 37.
Behavior of OUT13, 14, 21, 25 with VB = VB_LV for a time shorter than Thold
and with a valid ON condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 38.
Behavior of OUT13, 14, 21, 25 with VB = VB_LV for a time longer than Thold
and with a valid ON condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 39.
Behavior of OUT13, 14, 21, 25 with VB that drops lower than POR threshold during
cranking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 40.
LSx diagnosis circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 41.
Fault encoding condition diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 42.
LSx ON/OFF slew rate control diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 43.
Ignition-pre drivers (IGN1 to 4) circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 44.
Ignition-pre drivers (IGN1 to 4) diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 45.
External MOSFET gate pre-drivers circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73


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