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M24C64-DRMF8TG Datasheet(PDF) 6 Page - STMicroelectronics |
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M24C64-DRMF8TG Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 41 page  Description M24C64-DRE 6/40 DocID027358 Rev 1 1 Description The M24C64-DRE is a 64-Kbit serial EEPROM device operating up to 105 °C. The M24C64-DRE is compliant with the level of reliability defined by the AEC-Q100 grade 2. The device is accessed by a simple serial I2C compatible interface running up to 1 MHz. The memory array is based on advanced true EEPROM technology (electrically erasable programmable memory). The M24C64-DRE is a byte-alterable memory (8 K × 8 bits) organized as 256 pages of 32 bytes in which the data integrity is significantly improved with an embedded Error Correction Code logic. The M24C64-DRE offers an additional Identification Page (32 bytes) in which the ST device identification can be read. This page can also be used to store sensitive application parameters which can be later permanently locked in read-only mode. Figure 1. Logic diagram |
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