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BTS6143D Datasheet(PDF) 2 Page - Infineon Technologies AG

Part No. BTS6143D
Description  Smart Highside Power Switch
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Maker  INFINEON [Infineon Technologies AG]
Homepage  http://www.infineon.com
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Data sheet BTS 6143 D
Infineon Technologies AG
2 of 16
2003-Oct-01
Pin
Symbol
Function
1
OUT
O
Output; output to the load; pin 1 and 5 must be externally shorted* .
2
IN
I
Input; activates the power switch if shorted to ground.
Tab/(3)
Vbb
+
Supply Voltage; positive power supply voltage; tab and pin3 are internally
shorted.
4
IS
S
Sense Output; Diagnostic feedback; provides at normal operation a sense
current proportional to the load current; in case of overload,
overtemperature and/or short circuit a defined current is provided (see
Truth Table on page 8)
5
OUT
O
Output; output to the load; pin 1 and 5 must be externally shorted* .
*) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability
and decrease the current sense accuracy
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Symbol
Values
Unit
Supply voltage (overvoltage protection see page 4)
Vbb
38
V
Supply voltage for full short circuit protection 1)
Vbb
30
V
Load dump protection VLoadDump = UA + Vs, UA = 13.5 V
RI= 2
Ω, RL= 1.5 Ω, td= 400 ms, IN= low or high
VLoad dump2)
45
V
Load current (Short-circuit current, see page 5)
IL
self-limited
A
Operating temperature range
Storage temperature range
Tj
Tstg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC)
Ptot
59
W
Inductive load switch-off energy dissipation 3)
single pulse IL = 20 A, Vbb= 12V
Tj=150 °C:
EAS
0.3
J
Electrostatic discharge capability (ESD)
(Human Body Model)
acc. ESD assn. std. S5.1-1993; R=1.5k
Ω; C=100pF
VESD
3.0
kV
Current through input pin (DC)
Current through current sense pin (DC)
see internal circuit diagrams page 9
IIN
IIS
+15, -120
+15, -120
mA
Input voltage slew rate
Vbb
≤ 16V :
Vbb > 16V 4):
dVbIN / dt
self-limited
20
V/
µs
1)
Short circuit is defined as a combination of remaining resistances and inductances. See schematic on
page11.
2)
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
3)
See also diagram on page 11.
4)
See also on page 8. Slew rate limitation can be achieved by means of using a series resistor R
IN in the input
path. This resistor is also required for reverse operation. See also page 10.




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