C165UTAH datasheet(9/539 Pages) INFINEON

Part #	C165UTAH

Description	EMBEDDED C166 WITH USART IOM-2 AND HDLC SUPPORT

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Manufacturer	INFINEON [Infineon Technologies AG]

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9 / 539 page

C165UTAH

Page

Data Sheet

2001-02-23

Table of Contents

16.8.2

Register Table ordered by Address . . . . . . . . . . . . . . . . . . . . . . . . . . . 385

16.8.3

Detailed Register Description ordered by Address . . . . . . . . . . . . . . . 390

16.8.4

HDLC-Channel Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 413

17

Watchdog Timer (WDT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430

17.1

Operation of the Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431

18

Bootstrap Loader . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434

19

System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 439

19.1

System Startup Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 446

20

Power Reduction Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451

20.1

Idle Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451

20.2

Power Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 453

20.3

Status of Output Pins during Idle and Power Down Mode . . . . . . . . . . . . 453

20.4

Extended Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455

20.4.1

Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456

21

System Control Unit (CSCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460

21.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460

21.2

Operational Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460

21.2.1

Overview of CSCU submodules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460

21.3

XBUS Peripheral Configuration Block . . . . . . . . . . . . . . . . . . . . . . . . . . . 462

21.4

System Control Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463

21.4.1

Register Write Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463

21.4.2

Clock Output Frequency Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466

21.5

Peripheral Management Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470

21.6

Identification Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471

21.6.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 471

21.6.2

ID Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472

22

System Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 474

22.1

Stack Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 476

22.2

Register Banking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481

22.3

Procedure Call Entry and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 482

22.4

Table Searching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484

22.5

Peripheral Control and Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485

22.6

Floating Point Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485

22.7

Trap/Interrupt Entry and Exit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485

22.8

Unseparable Instruction Sequences

. . . . . . . . . . . . . . . . . . . . . . . . . . . 486

22.9

Overriding the DPP Addressing Mechanism

. . . . . . . . . . . . . . . . . . . . . 486

22.10

Pits, Traps and Mines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 488

23

Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489

23.1

Register Description Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489

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